Senior Design for Test (DFT) Engineer

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) stands as a global frontrunner in semiconductors, merging analog, digital, AI, and software technologies to facilitate advancements at the Intelligent Edge. Their innovations aid in tackling climate change, enhancing connectivity, and driving progress across automation, robotics, healthcare, energy, and data centers. Reporting over $11 billion revenue in FY25, ADI champions breakthrough possibilities worldwide.

Key Responsibilities

• Define and implement DFT specifications and architecture employing cutting-edge methods and tools.
• Provide methodology support, automate DFT flows, and drive innovation in DFT processes.
• Assist all product lines ensuring high coverage, minimal power consumption, and short test durations.
• Generate high-quality, verified Automatic Test Pattern Generation (ATPG) patterns.
• Conduct both pre-silicon and post-silicon verification as well as debug activities.
• Work autonomously and provide guidance to less experienced team members.

Mandatory Qualifications

• Between 6 to 8 years of hands-on experience in ASIC/SoC DFT roles.
• Expertise in DFT architectural planning and design.
• Proficient usage of Tessent DFT tools.
• Deep understanding of Scan, Test Compression, At-Speed Testing, MBIST, and LBIST.
• Practical experience with scan insertion, compression insertion, on-chip clock control insertion, ATPG, and DFT verification.
• Familiarity with gate-level simulation including timing annotation using SDF.
• Support for silicon test bring-up, failure analysis, and debug processes.
• Proficiency in scripting languages such as Perl, Python, and Tcl.
• Strong team orientation ensuring effective collaboration across peer groups.
• Excellent verbal and written communication skills.

Preferred Qualifications

• Experience with Cadence and Synopsys DFT tools.
• Knowledge of IEEE 1149 standards and JTAG protocols.
• Exposure to static timing analysis procedures.
• Experience with Built-In Self-Test (BIST) technologies.
• Working knowledge of synthesis and DFT insertion processes.
• Understanding of low power scan techniques and Unified Power Format (UPF).

Additional Information

Candidates requiring access to technical data must complete an export licensing approval process by U.S. regulatory bodies, unless they qualify as U.S. citizens, permanent residents, or protected individuals under applicable law.

Analog Devices is proud to be an equal opportunity employer fostering an inclusive culture where every individual can thrive regardless of background.

Applicants should note the role requires occasional travel (approximately 10% of working time) and operates on a first shift/day schedule.