Lead Synthesis Engineer – Design Implementation

Company Overview

Qualcomm India Private Limited is a leader in technology innovation, constantly pushing boundaries to enable next-generation experiences and spearhead digital transformation towards a smarter, connected world. As part of the Engineering Group in Hardware Engineering, this role contributes to the development of cutting-edge electronic systems including Digital, Analog, RF, optical, mechanical, test systems, FPGA, and DSP systems that support world-class product launches.

Role Overview

The Lead Synthesis Engineer will be responsible for planning, designing, verifying, testing, and optimizing hardware circuit implementation through synthesis processes. This position requires close collaboration with cross-functional teams to meet performance goals and aid in product commercialization.

Core Responsibilities

• Perform synthesis using tools like Synopsys Design Compiler and Cadence RC/Genus for complex chip designs.
• Execute multi-voltage and power-aware synthesis flows focused on low-power design methodologies including UPF flows.
• Write and debug timing constraints to ensure design timing closure.
• Conduct formal verification using Cadence LEC and Synopsys Formality tools to validate designs.
• Develop and maintain Perl and TCL scripts along with managing makefile automation flows.
• Collaborate with integration and RTL design teams (plus if experienced).
• Drive design ideas effectively from concept through to production.

Qualifications & Experience

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related engineering discipline with minimum 3 years hardware engineering experience; OR
• Master's degree in relevant fields with at least 2 years of related experience; OR
• PhD holders with a minimum of 1 year of relevant experience.
• At least 4 years of industry experience specifically in synthesis using Synopsys and Cadence tools.
• Strong understanding and expertise in multi-voltage designs, power-aware synthesis, and UPF based low power methodologies.
• Skilled in formal verification, timing constraints debugging, and scripting in Perl and TCL.
• Strong analytical and problem-solving capabilities with a history of successful design commercialization.

Additional Information

Masters in Electronics or Electrical Engineering is preferred. The employer is committed to equal opportunity and accessibility for individuals with disabilities, providing reasonable accommodations upon request. Qualcomm maintains stringent confidentiality policies and does not entertain unsolicited submissions from recruiting agencies.