Layout Engineer – DPG Layout

About Micron Technology

Micron Technology leads the world in developing memory and storage solutions that revolutionize information usage and enhance lives globally. The company is dedicated to driving rapid advances in learning, communication, and technology through innovative products and operational excellence.

Role Summary and Responsibilities

• Execute design and physical layout for analog, mixed-signal, and custom digital blocks while supporting full-chip integration using traditional layout techniques.
• Take ownership of block-level layout deliverables focused on quality, timing, and adherence to design intent.
• Conduct comprehensive layout verification, including design rule checks (DRC), layout versus schematic checks (LVS), antenna checks, and yield and quality analyses.
• Deliver precise and timely layouts under senior engineer guidance.
• Utilize AI-assisted tools to create or enhance SKILL, Python, and TCL scripts, automating routine layout and verification tasks to boost efficiency and standardize layouts.
• Support semicustom tools for custom and digital layout integration to speed up engineering change orders (ECOs), alignment, and integration updates.
• Collaborate extensively with Design, Verification, CAD teams and senior layouts engineers to clearly report layout progress and potential risks.
• Assist in reviewing layouts of less experienced engineers and actively share best practices and technical insights within the team.

Qualifications and Skills Required

• Minimum 3 years’ experience in analog/custom layout design within advanced CMOS process technologies.
• Proficient with Cadence Virtuoso (VLE/VXL) and Calibre tools for DRC and LVS, managing verification and closure responsibilities for assigned blocks.
• Experience designing critical analog and mixed-signal blocks such as temperature sensors, PLLs, ADCs, DACs, LDOs, bandgap references, charge pumps.
• Exposure to memory layout such as DRAM, SRAM, CAM or OTP is a plus.
• Strong foundation in analog layout principles including matching, symmetry, electromigration prevention, latch-up prevention, IR-drop mitigation, and dealing with coupling, crosstalk, and parasitic effects.
• Understanding how layout impacts circuit characteristics like speed, capacitance, power consumption, and physical area.
• Capability to interpret design constraints accurately and translate into manufacturable, robust layouts.
• Experience in developing or applying AI-based automation approaches to enhance physical layout productivity and quality.
• Exceptional problem-solving abilities for layout verification challenges and debugging.

Inclusivity and Compliance

Micron provides equal employment opportunity regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. The company adheres strictly to child labor laws, industry labor standards, and does not charge candidates recruitment fees or any unlawful payments.

Additional Information

Candidates are encouraged to truthfully employ AI tools for resume or application improvements; any misrepresentation via AI fabrication will lead to immediate rejection. Applicants should verify all communications claiming to be from Micron through official sources to avoid fraud.