Staff Engineer - Design Verification

About Ambiq

Ambiq is dedicated to delivering intelligence everywhere by driving the AI edge revolution through the world's most energy-efficient semiconductor solutions. Utilizing proprietary sub- and near-threshold fabrication technology, Ambiq's chips offer significant enhancements in power efficiency without requiring expensive process scaling. Since 2010, more than 300 million units have been deployed in devices such as smart wearables, medical gadgets, IoT products, and AI-enabled edge computing systems.

Our multidisciplinary teams cover design, research, development, production, marketing, sales, and operations across locations including Austin, Hsinchu, Shanghai, Shenzhen, and Singapore. We are fast-paced and focused on solving challenging problems, fostering personal and professional growth through meaningful and complex technological work.

Our core values are Innovation, Collaboration, Focus, Learning, and Achievement. We seek proactive, innovative problem-solvers passionate about advancing energy efficiency through technology.

Role Scope

The Staff Engineer will be responsible for the verification of digital and mixed-signal designs, including complex systems-on-chip (SoC) containing multiple CPUs, digital signal processors, security modules, and other logic for Internet of Things (IoT) platforms.

Key Responsibilities

• Take full ownership of design verification (DV) tasks and ensure delivery of high-quality verification results.
• Create comprehensive test plans targeting blocks, subsystems, and entire chips.
• Conduct SoC-level verification at module and full-chip levels.
• Apply knowledge of ARM or RISC-V microcontroller architectures in verification activities.
• Implement power-aware verification methodologies using CPF and UPF standards.
• Develop C language libraries and test packages to support verification.
• Architect and construct scalable, reusable module testbenches employing SystemVerilog and UVM frameworks.
• Design extensive test cases including stimulus generators and checkers to maximize coverage.
• Automate testing environments for randomized test execution and scoreboard integration.
• Utilize advanced debugging tools and methods to diagnose and resolve design and verification issues.
• Perform root cause analyses and coordinate with design teams to address defects.
• Define and monitor functional and code coverage metrics to confirm thorough verification.
• Ensure verification quality meets or surpasses industry standards and project specifications.
• Prior experience or knowledge of edge-based AI inference is advantageous.

Required Qualifications

• Bachelor's or Master's degree in Electrical Engineering.
• 7 to 10+ years of experience in block-level, subsystem, and full-chip verification engineering.
• Expertise in ARM M-series and/or RISC-V SoC verification.
• In-depth knowledge of AMBA protocols including AXI, AHB, and APB; DMA; flow control mechanisms; serial communication devices; and low power (CPF/UPF) verification.
• Experience integrating and verifying third-party intellectual property (IP).
• Familiar with peripheral modules such as UART, SPI, I2C; audio and display subsystems; USB; one-time programmable memory (OTP); and cryptography modules is preferred.
• Proficient in SystemVerilog with UVM methodology, Verilog, and programming languages including C/C++, Python, Perl, and build systems like Makefile.
• Proven track record of delivering multiple chips that meet functional specs.
• Ability to manage verification milestones, deliverables, and schedules effectively.
• Capabilities in risk identification and mitigation during verification phases.
• Strong collaboration skills working with design, architecture, and software teams to ensure design intent is verified.
• Effective communication skills to report progress, challenges, and outcomes to stakeholders and management.
• Advanced understanding of multiple processor architectures, 3rd party IP/VIP integration, mixed-signal designs, and low-power design verification challenges.
• Experience with design verification tailored to battery-operated low-power devices is highly valued.
• Capability in C-based verification programming within SoC environments is mandatory.
• Exposure to ARM processor designs and low power methodologies is considered a plus.