STA Design Engineer - Static Timing Analysis

About the Role

Qualcomm is seeking a Static Timing Analysis (STA) Design Engineer to join their team in Cork, Ireland. This role involves carrying out detailed static timing analysis, crafting timing constraints, and boosting timing performance for cutting-edge, high-performance, and energy-efficient products. Working closely with interdisciplinary teams, the engineer will focus on timing closure and confirming timing model accuracy to support successful product delivery.

Key Responsibilities

• Conducting STA and achieving timing closure for intricate processor cores and full-chip Systems on Chips (SOCs).
• Improving methodologies and techniques related to timing analysis and closure processes.
• Enhancing accuracy in timing closure and static/dynamic workflows to shorten turnaround times.
• Ensuring that all timing signoff criteria and checklists are satisfied.
• Automating tasks related to timing and power data extraction and analysis.
• Participating in project planning, including defining milestones and deliverables.
• Meeting project goals promptly and providing ongoing production support.
• Troubleshooting and resolving issues throughout development phases to ensure smooth project execution.

Candidate Profile

• Proficiency with STA tools such as PrimeTime, PrimeShield, or Tempus, especially for hierarchical analyses in large System on Chips.
• Practical experience using Tweaker, PrimeClosure, PTECO, or Tempus ECO tools to achieve timing closure.
• Advanced skills in automation languages including Python, TCL, or Perl.
• Solid understanding of ASIC design flows from RTL to GDS.
• Bonus: Knowledge or interest in Design for Parametric Yield.
• Familiarity with extraction and circuit simulation tools is advantageous.
• Strong problem-solving capabilities with a focus on delivering practical solutions within a research-driven setting.
• Excellent communication and interpersonal skills to excel within a dynamic, multi-disciplinary engineering environment.
• Minimum of four years' relevant industry experience.

Educational Requirements

• Bachelor’s degree in Science, Engineering, or related discipline with 4+ years of ASIC-related experience.
• Or Master’s degree with 3+ years of experience.
• Or PhD with 2+ years of relevant ASIC design, verification, validation, or integration experience.
• Comparable experience will also be considered if competencies and principal duties can be fulfilled.

Work Location

The position is based in Cork, Ireland’s second-largest economic hub, home to over 170 multinational companies employing around 39,000 people. The area offers a diverse and welcoming community, excellent quality of life, and easy access to numerous international destinations via Cork airport.

Equal Opportunity Employer

Qualcomm is committed to equal employment opportunities regardless of race, color, religion, sexual orientation, gender identity, national origin, disability, veteran status, or other protected categories.

Employment Benefits

• Competitive salary, stock options, and performance-based bonuses.
• Maternity and paternity leave.
• Employee stock purchase program.
• Matching pension plan.
• Support for education and professional development.
• Assistance with relocation and immigration if applicable.
• Life, medical, income, and travel insurance coverage.
• Discounted memberships promoting physical and mental wellness.
• Bicycle purchase scheme.
• Diverse employee-run clubs such as running, football, chess, and badminton.

Additional Information

Qualcomm provides accommodations for individuals with disabilities during the hiring process. The company expects all employees to adhere to security and confidentiality policies. Recruitment agencies are not authorized to submit candidates or resumes on behalf of applicants.