Senior Manager, Layout

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a worldwide leader in semiconductors, integrating analog, digital, AI, and software technologies to enable innovative solutions at the Intelligent Edge. ADI addresses global challenges like climate change, improves human connectivity, and advances automation, robotics, mobility, healthcare, energy, and data centers. The company generated over $11 billion in revenue in FY25, supporting innovators to stay ahead of possibilities.

About the ATE Group

The Automatic Test Equipment (ATE) organization within the Instrumentation division delivers cutting-edge testing solutions for advanced electrical and electronic systems, ranging from high-speed microprocessors to high-voltage electric vehicle battery modules. The group works closely with clients to define state-of-the-art stimulus and measurement architectures, emphasizing accuracy, energy efficiency, test timing, and channel density to create distinctive ATE capabilities.

Role Overview

The Senior Manager, Layout, is recognized as a leading expert at ADI, tackling highly complex and strategically important layout challenges. This role involves managing and leading a team of local layout engineers, driving technical innovation, delivering creative solutions, and mentoring team members to foster professional growth.

Primary Responsibilities

• Lead and manage a team of layout engineers working in advanced CMOS FinFET technologies (16nm and smaller) focused on complex integrated subsystems and solutions.
• Provide physical design leadership for high-speed, high-performance analog, mixed-signal, and digital products and subsystems, including ADCs, DACs, PLLs, transceivers, and receivers.
• Drive the development of floorplans at block, subsystem, and full-chip scales for large and complex designs.
• Collaborate with multidisciplinary teams such as DFT, clock, timing, power integrity, RTL, packaging, and analog designers to ensure smooth integration and successful design completion.
• Establish, implement, and continuously enhance design methodologies, best practices, and automated workflows while promoting knowledge sharing among teams.
• Lead physical verification activities, including design rule checking (DRC), layout versus schematic (LVS), electrical rule checking (ERC), density checks, extraction, electromigration/IR drop analysis, and final tapeout signoff.
• Develop project schedules, track progress, and ensure the punctual delivery of superior quality design milestones.
• Mentor and lead the layout engineering teams, encouraging their technical development and fostering project success.

Key Skills and Expertise

• Serve as a recognized technical authority with influence both within the organization and across the industry.
• Possess industry-leading expertise in integrated circuit layout, architecture design, and process optimization.
• Excel in guiding teams toward peak performance while cultivating a supportive and collaborative working environment.
• Demonstrate strong leadership promoting teamwork and optimizing organizational effectiveness.

Education and Experience

• Bachelor's degree in Electrical or Computer Engineering or a closely related field, or equivalent relevant experience.
• Over ten years of experience in full custom integrated circuit layout.
• Expertise in Cadence Virtuoso tools, particularly with advanced VXL capabilities.
• In-depth knowledge of LVS, DRC, antenna checks, and related verification and debugging methodologies.

Additional Information

Positions requiring access to technical data may necessitate export license approvals from U.S. government agencies. Candidates who are not U.S. citizens, permanent residents, or protected individuals under specified U.S. laws may be subject to export licensing reviews.

Analog Devices is committed to equal employment opportunity, championing diversity and inclusion regardless of race, religion, gender identity, sexual orientation, age, disability, military status, or any other legally protected status.

Travel requirements include up to 10% travel. The shift is a first shift/day schedule.