Senior Layout Engineer - Analog/Mixed Signal LPDDR PHY

Company Overview

Micron Technology is a global leader in delivering innovative memory and storage solutions designed to transform information into intelligence, accelerating advancements in learning, communication, and technology.

Role Overview

The Senior Layout Engineer role focuses on designing and optimizing custom analog and mixed-signal layouts for LPDDR PHY components, including critical data paths, bias networks, IO analog frontends, and reference circuits. The candidate will ensure layout robustness across process, voltage, and temperature variations while maintaining low noise and high matching accuracy.

Key Responsibilities

• Lead custom analog and mixed-signal layout efforts for vital LPDDR PHY analog blocks, emphasizing robustness and precision.
• Execute high-speed LPDDR interface layouts addressing signal integrity concerns such as skew, impedance, shielding, crosstalk, and jitter management using advanced fabrication nodes.
• Design and refine array-based layouts for LPDDR data and command/address lanes ensuring strict symmetry and scalability across multiple bytes and channels.
• Develop custom digital layout blocks within the LPDDR PHY, including training logic, calibration systems, and test/debug structures, taking into account clocking schemes and congestion.
• Collaborate closely with circuit designers to align on timing, noise, IR drop, and electromigration requirements, integrating parasitic considerations early in the design process.
• Implement best design practices involving power distribution, grounding, shielding (e.g., guard rings, deep-N-well), decoupling, and domain separation to safeguard sensitive signals.
• Conduct design rule check (DRC), layout versus schematic (LVS) verifications, extract parasitics, and correlate layout data with simulation results for validation.
• Support post-layout tuning and engineering change orders, resolving issues affecting timing margins, yield, and manufacturability while ensuring industry standard compliance.
• Partner with architecture, verification, and silicon debug teams to guarantee success in first silicon runs and high-volume manufacturing.
• Focus on power, performance, and area (PPA) optimizations to meet low-power, area-efficient, and reliability standards specific to LPDDR applications.
• Promote knowledge sharing and continual process improvements, contributing to VXL-compatible layout methodologies and best practices.
• Incorporate AI and machine learning techniques to enhance data-driven optimizations, automate layouts, and improve debugging workflows.

Qualifications

• Bachelor’s degree in Electronics, Electronics & Communications, or VLSI Engineering is required.
• Master’s degree in Electronics Engineering, Microelectronics, or VLSI Engineering preferred.
• Minimum 6 years of practical experience in analog and mixed-signal design, especially with high-speed serial interfaces.

Additional Information

Micron Technology is an equal opportunity employer, committed to inclusion and diversity without discrimination. The company prohibits child labor and adheres to labor laws and industry standards globally. There are no recruitment fees associated with applying or securing employment at Micron. AI tools may be utilized for resume enhancement, provided all information remains truthful and accurate; misrepresentation will lead to disqualification. Applicants should be wary of fraudulent job offers and always verify communications through official channels.