CPU Physical Design Engineer
Cambridge, England, United Kingdom · Full Time
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- Experience
- Any
- Salary
- —
- Openings
- 1
- Posted
- 1 minute ago
- Work mode
- In office
- Education
- Bachelor's degree in Electrical/Electronic or Computer Engineering or related field
- Resume
- Required to apply
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Job description
About the Role
A pioneering company focused on the development of next-generation CPU architectures and high-performance, energy-efficient processors on cutting-edge process technologies is seeking an experienced Physical Design Engineer. This role offers the chance to be deeply involved in implementing advanced CPU intellectual property within a top-tier engineering team.
Key Responsibilities
- Manage the physical design execution of sophisticated CPU components from synthesis stage through to final sign-off.
- Lead crucial physical design tasks including floorplanning, power planning, placement, clock tree synthesis, routing, and physical verification.
- Collaborate closely with teams working on RTL, architecture, static timing analysis, and methodology to optimize designs for performance, power consumption, and area efficiency.
- Diagnose and address issues related to timing, congestion, power consumption, and design rule checks during implementation phases.
- Enhance and automate design workflows by writing and maintaining scripts using TCL, Python, or Perl.
- Facilitate design closure utilizing state-of-the-art process technologies and contribute to establishing best design practices for upcoming projects.
- Work across multidisciplinary teams to deliver superior silicon products within tight schedules.
Candidate Profile
- Possession of a degree in Electrical/Electronic Engineering, Computer Engineering, or a closely related field.
- Hands-on experience in physical design for intricate ASICs or CPU/SoC architectures.
- Familiarity with all stages of physical design including floorplanning, placement and routing, clock tree synthesis, and physical signoff processes.
- Knowledge of mainstream EDA tools such as Cadence Innovus, Synopsys ICC2, Fusion Compiler, or equivalents.
- Strong comprehension of timing closure strategies, power optimization techniques, and physical verification procedures.
- Proficient scripting capability in TCL, Python, or Perl to improve automation and design flows.
Opportunity and Environment
This position grants the candidate the chance to engage with state-of-the-art CPU technology, latest process nodes, and tackle complex engineering challenges in a highly esteemed technical setting.
Minimum education
Bachelor's Degree