Senior Verification Engineer

Job Overview

We seek an experienced engineer to develop verification plans aligned with design specifications and drive innovation to optimize design and verification processes. The role requires expertise in creating IPCRV environments and the ability to interpret complex technical specifications. Knowledge of 3GPP standards or Serdes technology will be advantageous.

Responsibilities

• Develop and implement verification plans based on design requirements.
• Innovate and contribute novel ideas to enhance design and verification flows.
• Create IPCRV environments to support verification activities.
• Analyze and understand intricate technical specifications.

Qualifications

• Master’s or Bachelor’s degree in Electronics or Communications engineering or related fields.
• 4 to 10 years of experience in digital hardware verification.

Skills and Competencies

• Strong grasp of digital logic design principles.
• Hands-on experience with hardware verification languages, particularly SystemVerilog (SV).
• Proficiency in standard verification methodologies such as Universal Verification Methodology (UVM).
• Excellent problem-solving skills, logical reasoning, and aptitude.
• Effective communication abilities for multisite team collaboration.
• Proven teamwork, accountability, and a diligent work ethic.
• Familiarity with Digital Signal Processing and Communication Engineering fundamentals is beneficial.