Senior Principal CPU Architect – CPU Architecture, Microarchitecture, ISA, Performance Analysis, Hardware-Software Co-Design

Role Overview

We are collaborating with a prominent global semiconductor and advanced computing technology firm focused on developing the next wave of cutting-edge high-performance CPU architectures. In line with their ongoing commitment to advancing CPU technologies, they seek a seasoned Senior Principal CPU Architect to shape the design of upcoming generations of high-performance processors.

Core Responsibilities

• Lead strategy and exploratory research for future CPU architecture and technologies.
• Conceive, assess, and validate advanced microarchitectural ideas.
• Architect components including instruction fetch, decode, execution pipelines, out-of-order scheduling, and multi-layered memory hierarchies.
• Design and evaluate new instruction-set features, encompassing vector, matrix, and specialized compute instructions.
• Investigate emerging computational workloads, identifying bottlenecks at software and application levels.
• Convert workload and software insights into microarchitectural requirements for future designs.
• Collaborate extensively with compiler, operating system, and application development teams to achieve effective hardware-software co-design.
• Lead development and maintenance of detailed cycle-accurate CPU simulators using C++ and Python.

Required Experience and Expertise

• Over 10 years of relevant experience in high-performance CPU or related processor architecture industries.
• In-depth knowledge of high-performance CPU architecture and microarchitecture principles.
• Expertise in out-of-order execution and superscalar processor design.
• Comprehensive understanding of branch prediction techniques, register renaming, speculative execution, and execution pipeline design.
• Proficiency in cache hierarchy design and memory system architecture.
• Strong grasp of cache coherency protocols and related mechanisms.
• Thorough knowledge of instruction-set architecture (ISA) design principles, including exception models, memory consistency, and virtualization.
• Experience in workload profiling and performance analysis utilizing tools like VTune and Perf, including analysis of performance counters and simulation traces.

Technical Environment and Keywords

This position involves exposure to technologies and concepts such as C, C++, Python, cycle-accurate and architectural CPU simulators, performance modeling, VTune, Perf, LLVM, GCC, and instruction sets including x86, Arm, and RISC-V. The role focuses on domains including high-performance computing, AI workloads, generative AI, large language models, graph analytics, and confidential computing.

Additional Information

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