Principal Engineer, Design Verification Engineering

Company Overview

Analog Devices, Inc. (ADI) is a global leader in semiconductors, merging analog, digital, AI, and software technologies to create innovative solutions targeting climate change, automation, mobility, healthcare, energy, and data centers. With revenues exceeding $11 billion in FY25 and a workforce of approximately 25,000 globally, ADI supports innovation across 125,000 customers.

Role Overview

The Principal Engineer in Design Verification Engineering will join ADI's Power Controller (PWC) Design team in Ireland, which focuses on expanding power device portfolios through new smart control and integrated digital configurable features. This role plays a crucial part in verifying mixed-signal power converter controllers and collaborating closely with analog, digital, and silicon design teams.

Key Responsibilities

• Lead design verification efforts of mixed-signal power converter controllers from initial architecture through silicon bring-up, defining verification strategy and execution scope.
• Create and maintain comprehensive end-to-end verification plans, including test strategies, stimulus generators, checkers, and sign-off criteria aligned with product requirements.
• Develop and review SystemVerilog/UVM testbenches for digital and analog-mixed-signal verification using reusable components, constrained random stimulus, and self-checking techniques.
• Collaborate with system architects to convert system requirements into verifiable specifications and define closure metrics through reviews and traceability.
• Drive coverage metrics and closure processes to ensure verification completeness before tape-out, employing functional, code, and assertion coverage.
• Promote best practices in verification sign-off, including gate-level simulation, LINT, CDC/RDC, reset and cross-propagation strategies, assertions, and formal or semi-formal verification techniques.
• Build and sustain scalable regression frameworks with automation, dashboards, triage processes, and continuous integration for quality enhancement and quicker cycle times.
• Lead analog-mixed-signal verification utilizing behavioral models, such as Verilog-AMS and real-number models, and mixed-signal co-simulation for validating control loops, interfaces, and system interactions.
• Support silicon bring-up by partnering with design evaluation and applications teams, correlating simulation results with lab findings, identifying root causes, and feeding insights back into verification and design.
• Conduct verification reviews, risk assessments, communicate quality and status updates to stakeholders, and foster cross-team alignment on project priorities and deliverables.
• Mentor and develop other verification engineers, establish coding and review standards, and push continuous improvement in verification methodologies, tools, and reusable IP components.

Candidate Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Science, or equivalent with a minimum of 12 years’ relevant IC design verification experience; advanced degrees are advantageous.
• Proven expertise in delivering verification for multiple IC projects from concept to tape-out, including ownership of verification plans and sign-off readiness.
• Strong practical knowledge of SystemVerilog/UVM methodologies, constrained-random verification, self-checking testbenches, and debugging complex failures.
• Experience mentoring engineers and effectively communicating technical information across functions.
• Competence in verification sign-off practices, including coverage closure, assertions (SVA), linting, CDC/RDC, and formal/semi-formal verification with metrics-driven closure.
• Expertise in verifying processor subsystems, DSP, power controllers, or applying formal verification techniques.
• Preparedness to travel internationally up to 10% of the time.

Preferred Skills & Experience

• Familiarity with standard digital verification simulators and workflows such as Xcelium, VCS, and Questa, along with waveform and debugging tools.
• Experience using verification quality and sign-off tools including LINT, CDC/RDC, and formal verification to define and enforce sign-off standards.
• Strong scripting and automation abilities with languages such as Python, Tcl, shell scripting, and Make to develop regressions, dashboards, and continuous integration pipelines.
• Hands-on experience with behavioral modeling for AMS verification, including real-number and Verilog-AMS models and mixed-signal co-simulation.
• Interest or experience in leveraging AI tools to optimize and accelerate verification processes.
• In-depth understanding of integrated power management systems like buck/boost converters, control loops, and fault protection, and ability to translate system behaviors into effective verification scenarios.

Why Work at ADI

• Emphasis on empowering individual judgment and innovation freedom.
• Professional development opportunities and supportive mentoring environment.
• Alignment of personal goals with company objectives fostering mutual growth.

Additional Details

• Relocation assistance is available.
• Visa sponsorship is provided if needed.
• Travel requirement is approximately 10% internationally.
• Export licensing approval may be required based on applicant citizenship status.
• Equal opportunity employer with inclusive culture embracing diversity across multiple dimensions.
• Position involves first shift/daytime work schedule.