IP/SOC Design Verification Engineer

Role Overview

We are seeking an experienced IP/SOC Design Verification Engineer to join our semiconductor manufacturing company based in Hyderabad, India. The role involves comprehensive verification activities using SystemVerilog and UVM methodologies focused on various interconnect protocols and high-speed serial interfaces.

Responsibilities

• Perform IP verification using SystemVerilog and Universal Verification Methodology (UVM).
• Work extensively with interconnect protocols such as DDR, PCIe, MIPI, USB, Ethernet, CXL, UCI, and UFS.
• Engage with high-speed serial interfaces including PCIe, UCIe, USB, Ethernet, UPF, and DDR.
• Achieve coverage closure encompassing code, functional, and toggle coverage metrics.
• Utilize industry-standard verification tools such as Synopsys VCS and Cadence Incisive.
• Develop thorough technical documentation including Testbench Specification and Test Plan Specification.
• Apply scripting competencies in languages such as Perl, Python, Shell, or TCL to support verification tasks.

Requirements

• Minimum qualification of a Bachelor’s degree in Electronics Engineering.
• A Master’s degree in Electronics or Computer Science Engineering is considered advantageous.
• Substantial professional experience ranging from 8 to 15 years in related verification roles.
• Demonstrated experience working in multinational corporate environments.
• Excellent verbal and written communication skills are mandatory.
• Possess a proactive attitude for learning, growth, adaptability, and flexibility in dynamic work conditions.