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Design Verification Engineer

European Tech Recruit

Cork, County Cork, Ireland · Full Time

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Experience
3+ yrs
Salary
Openings
1
Posted
2 hours ago
Work mode
In office
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Job description

About the Role

Become a part of a global frontrunner in semiconductor and wireless technology by joining an elite engineering team dedicated to developing next-generation GPU intellectual property for advanced platforms. This position involves close collaboration with Design and Architecture teams to verify complex GPU designs from initial concept through to silicon implementation.

Key Responsibilities

  • Work alongside GPU Design and Architecture teams to grasp specifications and functional requirements.
  • Formulate comprehensive test and coverage strategies rooted in architectural and microarchitectural details.
  • Construct scalable, reusable verification methodologies and environments for design validation.
  • Develop testbenches, stimuli, checkers, assertions, trackers, and coverage frameworks to ensure exhaustive verification.
  • Carry out verification plans encompassing design initialization, regression testing, feature activation, and debugging efforts.
  • Monitor verification status by utilizing bug tracking, coverage assessment, and quality metrics.
  • Design and implement UVM-based functional verification tests for GPU features.
  • Troubleshoot and confirm the correctness of new GPU functionalities.
  • Participate in the creation and enhancement of novel functional verification methodologies.

Candidate Requirements

  • Minimum of 3 years experience in ASIC Design Verification or a comparable discipline.
  • Proficient in verification processes including test planning, simulation execution, scripting, debugging, and problem-solving capabilities.
  • Hands-on experience with SystemVerilog, UVM, Verilog or VHDL, as well as programming knowledge in C/C++.
  • Expertise in constrained random verification techniques, functional coverage metrics, and design debug practices.

Additional Information

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Tools & software

C required SystemVerilog required Verilog required

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