Analog IC Layout Engineer

Position Overview

We are looking for a proficient and driven Analog IC Layout Engineer to contribute to the development of innovative brain-computer interface technology in the HealthTech sector. This role involves working on implantable semiconductor chips designed to revolutionize patient outcomes and advance technological boundaries.

Key Responsibilities and Expertise

• Design and implement silicon-proven analog and mixed-signal layouts, particularly for amplifiers and data converters, ensuring precise matching and minimal noise interference.
• Employ thorough knowledge of semiconductor device physics combined with CMOS microfabrication processes to support design and development.
• Manage and execute complete physical verification procedures including Design Rule Checking (DRC), Layout Versus Schematic (LVS), Electrical Rule Checking (ERC), and Parasitic Extraction (PEX) using leading electronic design automation (EDA) software.
• Apply specialized precision analog layout techniques such as matching, isolation, and shielding to optimize chip performance.
• Understand and mitigate layout-dependent effects in compact, multi-channel neural System on Chips (SoCs).

Candidate Requirements

• Bachelor’s degree or higher in Electrical Engineering, Microelectronics, Physics, or a closely related discipline.
• An active work permit for Germany is mandatory; candidates must be based within the European Union.
• Suitability for candidates ranging from entry-level to senior experience.