Staff Engineer – High Performance DSP Core Implementation (Synthesis)

About Qualcomm

Qualcomm India Private Limited is a pioneering technology company dedicated to pushing the limits of innovation to enable next-generation experiences. We focus on advancing communication and data processing technologies, driving a more intelligent, connected future.

Role Summary

As an ASIC Engineer specializing in synthesis at Qualcomm, you will be responsible for defining, modeling, designing (both digital and analog), optimizing, verifying, validating, implementing, and documenting intellectual property development for cutting-edge, low power, high-performance products. Collaboration with cross-functional teams is essential to ensure successful product execution.

Key Responsibilities

• Apply in-depth expertise in physical synthesis and synthesis methodologies using leading industry tools.
• Create and manage timing constraints for synthesis, static timing analysis, timing closure, and implement pipelining to enhance performance.
• Drive timing closure activities for designs involving multiple clock domains.
• Execute multi-cycle multi-mode synthesis and optimization processes.
• Implement low-power design techniques leveraging Unified Power Format (UPF).
• Utilize scripting languages such as Perl, Python, and TCL for automation and tool enhancements.
• Implement various power optimization strategies including clock gating.
• Coordinate independently with design, design-for-test (DFT), and physical design teams to deliver netlists and validate timing constraints.
• Manage engineering change orders (ECOs), perform formal verification, and maintain stringent quality standards.

Required Skills and Experience

• Strong proficiency with Python and TCL scripting.
• Familiarity with synthesis tools such as Fusion Compiler and Genus.
• Working knowledge of Logical Equivalence Checking (LEC) and low-power signoff tools.
• Expertise in front-end VLSI design workflows, including Verilog/VHDL coding, synthesis, Quality of Result (QoR) optimization, and equivalence checking.
• Understanding of software engineering best practices including version control, configuration management, and regression testing is beneficial.
• Demonstrated ability to work independently, take initiative, and embrace new challenges.

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or a related discipline with a minimum of 4 years in ASIC design, verification, validation, or integration;
• OR Master's degree with at least 3 years of relevant ASIC experience;
• OR PhD with at least 2 years of relevant ASIC experience;
• At least 8 years hands-on experience with synthesis and Logical Equivalence Checking.

Additional Information

Qualcomm is an equal opportunity employer committed to accessibility and inclusivity. Applicants requiring accommodations during the recruitment process can contact the company to arrange necessary support. Employees are expected to comply with all company policies, including those protecting confidential and proprietary information.

Note: Recruiting agencies are not authorized to submit applications on behalf of candidates; unsolicited submissions will not be considered.