Senior Verification Engineer

Job Overview

Join our Solution Engineering team accountable for developing and verifying intellectual properties for various system-on-chip (SoC) projects. These projects incorporate both internally developed and third-party IPs. We seek an innovative and driven Senior Verification Engineer to perform RTL verification of new SoC features on Arm platforms, ensuring compliance with architectural specifications and quality standards.

Key Responsibilities

• Work closely with RTL designers and system architects to gain a thorough understanding of specifications and microarchitectural details.
• Create new validation setups and enhance existing verification environments, including stimulus generation, checking mechanisms, and coverage systems.
• Formulate and finalize comprehensive verification and test plans.
• Execute verification strategies collaboratively with other engineers to meet functional goals.
• Lead efforts towards achieving closure on functional and code coverage targets.
• Troubleshoot and resolve complex issues within design and verification processes.
• Contribute to the ongoing refinement of verification methodologies, tools, and communication protocols.
• Provide technical guidance and mentorship to junior engineers.

Essential Qualifications and Experience

• Possess a Bachelor's or Master's degree in Computer Science, Electrical/Computer Engineering, or a related discipline, or equivalent practical experience.
• Over 5 years of hands-on experience in verifying IP, subsystems, or SoCs.
• Advanced skills in SystemVerilog and Verilog languages.
• Proficient with Universal Verification Methodology (UVM) or equivalent industry-standard methodologies.
• Experience in building constrained-random verification environments and reusable verification components.
• Capable of designing verification strategies and test protocols effectively.
• Solid understanding of SoC verification workflows including software integration.
• Knowledge of scripting languages such as Python or Perl to automate verification tasks.
• Strong analytical capabilities with effective debugging and problem-solving skills.
• Excellent communication and interpersonal abilities to work effectively with distributed teams.

Desirable Skills

• Familiarity with Arm-based chip designs and architecture.
• Experience with AMBA protocols including CHI, AXI, AHB, and APB.
• Knowledge of JTAG, SWD, or TAP debug infrastructures.
• Understanding of clock domain crossing (CDC), reset domain crossing (RDC), and power-aware verification techniques.
• Exposure to low-power design methodologies and power format standards like UPF/CPF.
• Experience with design-for-test (DFT) methodologies, including scan chains and MBIST.

Additional Information

Our Philosophy: We embrace a '10x Mindset' which encourages curiosity, ambition, and transformative impact on technology used by millions.

AI Usage in Application Process: Applicants may use AI to refine written materials or practice interview questions but must provide original responses during assessments.

Recruitment Accommodations: We offer support and adjustments during the hiring process; candidates can request accommodations confidentially via email.

Work Arrangement: Our hybrid working policy offers flexibility while prioritizing team collaboration; specific arrangements depend on local regulations and team needs.

Diversity and Inclusion: We are committed to equal opportunity employment irrespective of race, gender, religion, or other protected characteristics.

Salary: The annual compensation ranges from £73,500 to £99,500.