Senior Sensors Design Verification Engineer
Cork, County Cork, Ireland · Full Time
Be the first to apply
- Experience
- 4+ yrs
- Salary
- —
- Openings
- 1
- Posted
- 4 weeks ago
- Work mode
- In office
- Education
- Bachelor's degree in Science, Engineering, or related field
- Resume
- Required to apply
Where you'll work
Sign in to tell us what does and doesn't work for you here — it sharpens every match we show you.
Job description
About Qualcomm and the Role
Qualcomm is a pioneering leader in technology innovation, driving advances in communication and data processing to create smarter, connected experiences worldwide. We are seeking a Senior Sensors Design Verification Engineer to contribute to sensor systems engineering within our Sensors Technologies group, working at our Cork, Ireland location.
Key Responsibilities
- Utilize advanced verification methodologies such as UVM (Universal Verification Methodology) and Formal Verification to ensure quality deliverables.
- Develop verification testbenches and components including UVCs, C models, and reusable verification environments that span vertical and horizontal scopes.
- Perform verification of sensor algorithm RTL designs to meet ASIC tapeout criteria.
- Create test plans derived from design documentation and collaborate closely with design and systems engineers.
- Integrate C models within UVM test frameworks and author SystemVerilog assertions to enhance verification processes.
- Debug and optimize RTL against test vectors, ensuring bit-level exactness.
- Analyze coverage statistics and partner with design teams to address identified gaps.
- Augment and develop regression frameworks and troubleshoot regression failures alongside design and systems teams.
- Support subsystem integration by planning tests, delivering test vectors, and debugging at an integration level.
- Automate workflows and improve team efficiency using Python scripting.
- Participate actively in project reviews and assist software and other teams during debug phases.
- Maintain comprehensive documentation of verification activities and results.
Qualifications and Experience
- Degree in Science, Engineering, or related discipline (Bachelor's preferred; Master’s or PhD with relevant experience also accepted).
- Minimum of 4 years experience in ASIC design verification with a focus on UVM-based functional verification or equivalent.
- Experience with formal verification tools such as Jasper or VC_Formal is advantageous.
- Familiarity with SystemC and Matlab considered a plus.
- Knowledge of gate-level simulation debugging and power extraction tools is beneficial.
- Proven expertise in constrained-random verification flows using UVM and coverage-driven methodologies.
- Strong skills in System Verilog Assertions and test failure debugging aligned with coverage and functional goals.
- Extensive use of RTL simulation tools and scripting capabilities in Perl or Python for automation.
- Working knowledge of C/C++ programming.
- Excellent analytical abilities complemented by effective communication and interpersonal skills for teamwork.
Work Environment and Benefits
The position is based in Cork, Ireland—a vibrant economic hub hosting numerous international companies and offering exceptional quality of life. The locality benefits from excellent connectivity, including access to international and transatlantic flights.
Qualcomm promotes an inclusive and diverse workplace. We provide a competitive salary package complemented with stock options and performance bonuses. Additional benefits include maternity/paternity leave, employee stock purchase plan, pension matching, education assistance, relocation support, comprehensive insurance policies, subsidized wellness memberships, bicycle purchase schemes, and participation in employee-run clubs promoting various activities.
Equal Opportunity and Accessibility
Qualcomm is committed to equal employment opportunities for all applicants regardless of race, color, religion, sexual orientation, gender identity, national origin, disability status, veteran status, or other legally protected categories. Reasonable accommodations for individuals with disabilities are provided throughout the recruitment process to ensure inclusiveness.
Level
Senior
Minimum education
Bachelor's Degree