Senior Functional Verification Engineer - Graphics/Multimedia

About AMD and Role Overview

At AMD, technology is harnessed to improve lives—transforming healing, entertainment, and connectivity. We seek passionate individuals eager to solve global challenges and positively impact the world through innovative technologies. AMD is at the forefront of advancing supercomputing, high-performance computing, cloud solutions, and artificial intelligence. Every role contributes to pioneering technology that propels progress.

As an integral part of the Client/Graphics Group, you will bring cutting-edge designs from concept to silicon readiness. Working within the front-end design and integration teams, you will collaborate closely with architecture, IP design, physical design, and product engineering groups to achieve first pass silicon success.

Key Responsibilities

• Lead pre-silicon verification efforts across full-chip, block-level, multi-chip, and system-level environments.
• Develop and specify verification plans at both SoC and IP levels, including reviewing complex block verification strategies.
• Create sophisticated verification environments employing the latest coverage- and assertion-based methodologies.
• Build self-checking, reusable, and automated verification environments applicable to both full-chip and block levels.
• Utilize constrained random generators and reference models to support verification processes.
• Take hands-on responsibility for the scope and execution of functional verification activities.
• Mentor and guide junior engineers within the team.
• Collaborate with internal and external stakeholders to implement company-wide solutions.

Preferred Qualifications and Experience

• Over 12 years of experience in ASIC Design Verification.
• Deep understanding of ASIC design flows and SoC architectures.
• Proficiency in developing complex testbenches and models using Verilog, SystemVerilog, or SystemC.
• Experience with coverage-driven verification methodologies.
• Skilled in writing comprehensive test plans and test cases.
• Strong debugging capabilities for functional simulations are essential.
• Experience with random test generation, coverage analysis, and failure debugging.
• Familiarity with low power verification concepts (NLP/UPF) and emulation is advantageous.
• Advanced programming skills in Verilog, SystemVerilog, PLI interfaces, C/C++, and scripting languages such as Perl and Shell.
• Excellent communication skills and ability to foster a collaborative global team environment.

Educational Requirements

• Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.

Additional Information

AMD is committed to equal opportunity and inclusive employment practices, welcoming candidates from diverse backgrounds and accommodating needs at all recruitment stages. AMD may utilize Artificial Intelligence tools during the candidate screening and selection process in line with its Responsible AI Policy. This vacancy is for an existing position. AMD does not accept unsolicited resumes from agencies or recruiters.