- Experience
- 4–8 yrs
- Salary
- —
- Openings
- 1
- Posted
- 4 days ago
- Work mode
- In office
- Resume
- Required to apply
Where you'll work
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Job description
About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI) is a worldwide leader in semiconductors, integrating analog, digital, AI, and software technologies to tackle challenges at the Intelligent Edge. The company powers innovations in automation, robotics, healthcare, mobility, climate technology, energy, and data centers, with a FY25 revenue exceeding $11 billion.
Job Responsibilities
- Define and optimize DFT architecture, understanding SoC structure and testing requirements thoroughly.
- Collaborate closely with lead Product and Test Engineers during DFT planning to enhance test cost-efficiency and ensure comprehensive coverage.
- Drive optimized DFT solutions focusing on scan partitioning, compression, at-speed testing, IR, low power, MBIST for memories, and JTAG boundary scan insertion.
- Manage hierarchical scan activities at both block and chip levels with implementation responsibilities.
- Develop and upgrade SCAN and MBIST insertion flows, create timing constraints for these modes, and address timing violations.
- Implement ATPG flows supporting various fault models and generate relevant test patterns.
- Simulate scan, MBIST, and boundary scan patterns and devise approaches for testing analog macros.
- Support post-silicon bring-up by coordinating with Evaluation and Test Engineering teams, assist in failure analysis, and collaborate with Operations to enhance test cost and yield.
- Continuously improve DFT methodologies aligning with industry’s leading practices and technologies.
- Coordinate with physical design teams throughout product development.
- Mentor new team members on DFT methodologies, flow execution, and best practices.
Qualifications and Experience
- 4 to 8 years of industry experience specializing in DFT engineering.
- Proven track record of delivering at least one or two products from architecture through scan implementation and simulation to production.
- Hands-on involvement with post-silicon activities is essential.
- Preferred experience with Tessent DFT tools including SCAN, MBIST, LBIST, OCC, EDT, SSN, and Boundary Scan.
- Strong communication and interpersonal skills for effective collaboration with global product and CAD tool teams.
- Proficiency in scripting languages such as Perl, Python, and TCL; solid understanding of HDLs.
- Advantageous to have knowledge of deep submicron effects and low power design methodologies using UPF/CPF.
- Experience with Cadence digital implementation tools such as Genus and Tempus is preferred.
- Additional benefit if experienced in timing closure and physical design.
Additional Information
Applicants who require access to technical data may be subject to export licensing approval from U.S. regulatory bodies. Only US Citizens, US Permanent Residents, and protected individuals as defined by relevant laws may be exempt from this review.
Analog Devices promotes equal opportunity employment, supporting inclusive work culture regardless of diverse backgrounds and protected characteristics.
Other Details
- Position type: Experienced hire
- Required travel: Approximately 10% of the time
- Shift: First shift / daytime hours
Industry
Semiconductors