Senior C++ Engineer - High Frequency Trading

Overview

The Systematic Platform Execution & Exchange Data (SPEED) Team operates at the heart of Millennium's Equities, Quant Strategies, and Shared Services Technology, powering the firm's ultra-low latency solutions for systematic and high-frequency trading (HFT). This team develops and manages live trading and market data platforms accessed by portfolio managers and risk systems. These platforms include Latency Critical Trading (LCT), DMA OMS (Client Direct), DMA market data feeds, packet capture (PCAPs), enterprise market data, and intraday data services, covering latency sensitivities from sub-100 nanoseconds to workflows in the millisecond range. The SPEED infrastructure enables portfolio managers and researchers to compete efficiently in highly time-sensitive markets.

Key Responsibilities

• Design and develop foundational ultra-low latency components such as order entry systems, market data handlers, exchange simulators, feature extraction modules, and strategy container frameworks.
• Create supportive tooling and services that simplify onboarding processes for trading teams joining Millennium.
• Engage in a global follow-the-sun support rotation at second-level for latency-critical systems, including real-time diagnostics and resolution of production challenges.
• Collaborate closely with system architects, quantitative researchers, and business stakeholders to deliver high-return, strategically aligned technical solutions.
• Provide technical leadership over SPEED's low-latency trading platforms within the Asia-Pacific region by guiding architectural decisions, enforcing quality and performance benchmarks, and mentoring junior engineers.
• Coordinate with multiple teams across Millennium based on project requirements.

Qualification & Skills

• Minimum of five years’ experience working within a reputable high-frequency trading team, focusing on production-grade, ultra-low latency systems.
• Advanced expertise in C++ and Python programming for production environments geared toward low latency.
• In-depth understanding of Linux system internals, CPU architecture including caches, NUMA configurations, branch prediction, and experience in performance profiling.
• Proficiency with ultra-low latency network technologies including multicast market data feeds, TCP/UDP protocols, kernel bypass technologies such as DPDK or Onload, and familiarity with custom NIC/FPGA stacks is advantageous.
• Strong comprehension of the HFT quantitative research workflow.
• Experience with high-performance computing (HPC) grids, including job scheduling, storage management, and workload handling for both research and production.
• Experience with cloud platforms such as AWS or Google Cloud Platform is beneficial.
• Demonstrated ability to navigate complex organizational structures, foster cross-team collaboration, and drive impactful outcomes.
• Self-driven with strong ownership, capable of managing time effectively, prioritizing tasks, and meeting deadlines consistently.
• Proven track record of technical leadership, influencing teams broadly with potential for formal team management.