Principal Design Engineer - Analog Mixed Signal / Memory

About Cadence

Cadence is a leading force in electronic design, with over three decades of expertise in computational software. The company leverages its Intelligent System Design approach to provide integrated solutions including software, hardware, and IP that convert design ideas into actual products. Serving some of the world’s most forward-thinking companies, Cadence’s technologies power advanced electronic products from chips to entire systems across a broad spectrum of applications such as consumer electronics, hyperscale data centers, 5G communication systems, automotive sectors, aerospace, industrial, and healthcare.

Job Overview

This position focuses on leading the design of analog and mixed-signal components integral to high-speed memory interfaces, particularly for DDR memory interface PHYs at cutting-edge technology nodes like 5nm FinFET CMOS. Responsibilities encompass designing complex circuit blocks such as IOs, amplifiers, comparators, drivers, duty cycle correctors, PLLs, DLLs, and level shifters used in commercial volume production.

Responsibilities

• Lead the design of high-speed memory interface products capable of data rates exceeding 36 Gbps using advanced semiconductor processes.
• Develop analog/mixed-signal integrated circuit blocks from conceptualization and specification through to final verification ensuring alignment with customer requirements.
• Collaborate closely with Physical Design Engineers focused on IC circuit blocks and physical medium attachment (PMA) sections.
• Coordinate with Technical Team Leads specializing in circuit design and architectural strategy.
• Provide mentorship and guidance to junior engineering team members as project needs arise.
• Engage with global teams distributed across several regions including the US, India, China, and Europe, accommodating various time zones.

Qualifications

• Possess a Bachelor or Master of Engineering degree, or equivalent qualification.
• Have at least 4 years of experience designing CMOS circuits, ideally in the fields of CMOS SERDES, DDR, or other high-speed I/O IC design domains.
• Thorough understanding of jitter phenomena and signal equalization methods.
• Design experience with SERDES components such as drivers, receivers, serializers/deserializers, phase interpolators, low-jitter PLLs, high-speed clock distribution networks, bias circuits, bandgap references, and voltage regulators.
• Demonstrate strong problem-solving capabilities, a solid aptitude for analog design, effective communication skills, and the ability to collaborate well within teams.
• Proficient in using CAD tools for circuit simulation, layout, and physical verification, ideally including Cadence tools. Experience with lab testing for silicon evaluation is a plus.

Additional Information

Cadence is dedicated to fostering equal employment opportunities and equity across all organizational levels. The company promotes a diverse and inclusive working environment and is committed to attracting qualified candidates from varied backgrounds.

If you are passionate about impactful technological work and solving challenging problems, this role offers a platform to contribute meaningfully to innovative electronic design.