CPU Design Verification Engineer
Cambridge, England, United Kingdom · Full Time
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Job description
Overview
This exciting role is for an experienced Design Verification Engineer to join a leading global semiconductor company, collaborating closely with their CPU team located in Cambridge, UK. The focus is on validating CPU and System on Chip (SoC) micro-architectures to guarantee that the designs meet the highest quality standards before product launch.
Key Responsibilities
- Collaborate with CPU and SoC Architects to comprehend architectural concepts and high-level system demands.
- Create comprehensive Test and Coverage plans derived from architecture and micro-architecture insights.
- Develop scalable and portable verification methodologies across environments.
- Construct verification environments, incorporating stimulus, checkers, assertions, trackers, and coverage components.
- Design verification plans and testbenches for assigned functional areas.
- Perform execution of verification plans, including design and DV environment bring-up, running regressions to enable features, and troubleshooting test failures.
- Monitor and communicate DV progress using diverse metrics, including bug tracking and coverage analysis.
Candidate Profile and Requirements
- Comprehensive understanding of microprocessor verification with expertise in cache coherence, memory ordering and consistency, prefetching, branch prediction, renaming, speculative execution, and address translation/memory management.
- Familiarity with Random Instruction Sequencing (RIS) for block/unit and subsystem/chip level design validation.
- Experience leading small teams of verification engineers focused on CPU verification tasks.
- Knowledge of advanced techniques such as formal verification, assertions, and silicon bring-up is advantageous.
- Strong ability to write test plans, portable testbenches, transactors, and assembly code.
- Experience with various verification methodologies and tools including simulators, coverage collection, gate-level simulation, waveform viewers, and formal proof tools.
- Capability to independently develop and manage verification efforts for a design block or unit.
Additional Information
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