ASIC STA Engineer

Position Overview

Black Sesame Technologies is inviting enthusiastic and skilled fresh graduates to join our team as ASIC STA Engineers. This entry-level role is an ideal starting point for recent graduates aiming to build a career focused on ASIC design and timing analysis. Candidates should demonstrate eagerness to learn and actively contribute to cutting-edge projects.

Responsibilities

• Manage timing closure activities at the block level throughout the entire project to uphold design integrity.
• Develop and maintain effective methodologies and workflows dedicated to timing verification and closure to ensure flawless timing management.
• Work closely with design teams to create and apply timing constraints (SDC files) essential for optimal design performance.
• Perform comprehensive timing analyses assessing that designs meet all required specifications and performance targets.
• Support building and enhancing workflows aimed at boosting efficiency and effectiveness in timing analysis tasks.
• Serve as a key coordinator between front-end and back-end teams to meet the chip's Power, Performance, and Area (PPA) objectives.

Requirements

• Possess a Master’s degree or higher in Electronics Engineering, Computer Science, or related technical discipline.
• Solid foundational understanding of ASIC timing analysis and synthesis methodologies.
• Knowledge of ASIC design flow and development lifecycle.
• Competency in scripting and programming languages such as Perl, Tcl, Python, or equivalent.
• Excellent communication skills, ability to collaborate effectively within teams, and a proactive mindset towards continuous learning and solving challenges.