Senior Staff RTL Design Engineer

About Qualcomm

Qualcomm is at the forefront of technological innovations, pushing limits to deliver the next generation of communication and data processing technologies, fostering a smarter, connected future. Within the ASIC Engineering group, engineers engage in defining, modeling, designing (both digital and analog), optimizing, verifying, validating, implementing, and documenting IP blocks and SoCs, contributing to products that are high-performing, low power, and top quality. Collaboration with cross-disciplinary teams is key to guiding product execution efficiently.

Job Overview

We seek a seasoned SoC RTL Design Engineer to join our expanding connectivity networking product engineering team in Toronto. You will engage in the full semiconductor development lifecycle, from concept through to product delivery, primarily on next-generation connectivity networking SoC designs focused on AI datacenter scale applications.

Responsibilities

• Design microarchitecture and develop RTL code for SoC subsystems and IP blocks.
• Create detailed microarchitecture documentation for hardware components.
• Perform RTL quality assurance including linting, clock domain crossing (CDC), and logic equivalence checking (LEC).
• Develop synthesis constraints and Unified Power Format (UPF) files; execute clock latency paths (CLP) checks.
• Collaborate with verification teams to analyze, debug, and resolve reported issues to meet functional and code coverage goals.
• Partner with physical design teams to ensure area, power, and performance targets are achieved.
• Support functional verification, software integration, FPGA, and physical design teams to guarantee top quality SoC and successful tapeout.
• Coordinate with SOC architects and leads on design integration and sign-off activities for verification plans, design-for-test (DFT), and physical design implementation.

Qualifications

• Bachelor's degree with 6+ years; or Master's degree with 5+ years; or PhD with 4+ years in ASIC design, verification, validation, or integration.
• Strong multi-project experience in RTL SoC design using Verilog or VHDL and familiarity with ASIC/FPGA debug techniques.
• Preferred knowledge of SerDes PHY, DSP, and analog mixed-signal design.
• Familiarity with Ethernet and PCIe standards is advantageous.
• Expertise in reviewing high-level test plans and coverage metrics in verification processes.
• Proficient in Design Compiler synthesis and formal verification through logic equivalence checking.
• Solid understanding of timing closure methodologies.
• Experience in post-silicon debugging and bring-up processes.
• Strong communication skills and ability to work collaboratively in a team-oriented environment.

Desirable Skills

• Experience creating architecture and microarchitecture based on specifications.
• Understanding of bus protocols such as AHB, AXI and peripherals including PCIe, USB, Ethernet.
• Knowledge of memory controller architectures and microprocessor design.
• Familiarity with chip IO design and packaging techniques.

Additional Information

Qualcomm is committed to workplace accessibility and reasonable accommodations for individuals with disabilities during the hiring process. Candidates requiring accommodations may contact Qualcomm via designated channels. The company enforces strict confidentiality and security policies for all employees to protect proprietary information.

Note: Qualcomm only accepts applications directly from individuals seeking employment. Resumes submitted by recruitment agencies or unsolicited contacts will not be considered.