Senior Engineer, Analog and Custom Layout Design

About SiTime

SiTime is a leading company in Precision Timing technology, offering MEMS-based programmable semiconductor timing solutions that replace traditional quartz devices with enhanced accuracy, compact size, and durability. These innovations power over 400 applications in sectors such as AI data centers, autonomous vehicles, industrial and humanoid robots, wearables, and IoT devices. SiTime has shipped over 4 billion devices, shaping the future of timing in electronics.

Role Overview

The Senior Layout Design Engineer will spearhead custom analog layout design at various hierarchical levels of CMOS and BiCMOS integrated circuits. This role involves coordinating and reviewing the work of offshore layout teams, mentoring junior engineers, shaping standardized layout methodologies across global sites, and establishing processes to maintain superior layout design quality.

Key Responsibilities

• Collaborate remotely with local and international design and layout groups across multiple design centers and time zones.
• Lead and execute custom analog layout design for top-chip, functional blocks, sub-blocks, leaf cells, and standard cells in CMOS and BiCMOS technologies.
• Implement schematic-driven layouts ensuring adherence to design constraints.
• Create area-optimized layouts that satisfy circuit design requirements.
• Develop and manage top-chip and block-level floor plans, including power distribution schemes, shielding designs, and device matching layouts.
• Validate layouts and secure successful completion of DRC, LVS, and ERC verification signoffs.
• Perform advanced chip-level routing and related layout processes.
• Oversee chip integration, verification, and tape-out procedures.
• Support other projects as assigned by management.
• Provide training and mentorship to junior layout engineers and offshore contractors.
• Contribute to defining and implementing best practices and workflows shared across all sites.
• Establish and refine processes to uphold high-quality layout standards.

Candidate Qualifications

• Bachelor’s degree or equivalent experience in Layout Design or related engineering fields.
• More than 8 years of experience designing layouts for analog and full-custom digital circuit blocks.
• Knowledge and practical experience with TSMC process technologies at 180nm, 65nm, and 22nm nodes.
• Expertise in using layout editing tools, especially within the Cadence Virtuoso environment.
• Strong familiarity with debugging and verification using Cadence PVS or Mentor Calibre for DRC, LVS, and ERC.
• Understanding of critical layout considerations such as parasitic effects, device matching, crosstalk, layout-dependent effects, latch-up, IR drop, electromigration, and isolation techniques.
• Demonstrated ability to address challenges related to device matching, electromigration, signal integrity, power distribution, and space optimization.
• Experience in chip-level floorplanning, analog block integration, chip-level verification, and tape-out activities.
• Proficiency in automation via productivity tools and design scripting to enhance workflow efficiency.
• Physical capability to lift, push, and pull objects up to 5 lbs as part of work activities.

Preferred Attributes

• Exceptional attention to detail, with an organized approach and ability to devise efficient layout techniques.
• Consistently delivers projects within timeframes.
• Self-driven and collaborative with strong communication skills.
• Effective contributor in dynamic and fast-paced team environments.

Compensation & Benefits

SiTime offers a comprehensive compensation package reflecting the value of excellent work, which includes a competitive base salary, quarterly bonuses linked to innovation achievements, and equity grants providing participation in the company's long-term growth.

Diversity & Inclusion

SiTime is committed to equal opportunity employment, maintaining a discrimination-free workplace for all individuals regardless of race, color, religion, national origin, gender identity, age, disability, veteran status, or other legally protected statuses. The company also participates in the E-Verify program.