Principal Engineer - Analog RF Design

About Microchip Technology Inc.

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Role Overview

We seek a seasoned, hands-on RF Integrated Circuit (RFIC) Design Engineer specializing in RF CMOS technology for our Wireless IP Design Group. This position involves designing vital RF components for Bluetooth, Wi-Fi, UWB, and other wireless products within a collaborative global team.

Key Responsibilities

• Design RFIC modules such as RF synthesizers, voltage-controlled oscillators (VCO), local oscillator generation circuits, transmitter and receiver chains including LNAs, mixers, power amplifiers and drivers, baseband blocks, and biasing circuits.
• Lead schematic design and simulations targeting performance metrics, area optimization, and power consumption goals.
• Oversee and review layout tasks with layout engineers focusing on floor planning, device matching, routing, shielding, and electrostatic discharge (ESD) techniques.
• Collaborate with system design teams to convert top-level radio and product requirements into detailed block budgets and circuit specifications.
• Supervise validation, debugging, lab bring-up processes, bench measurements, simulation correlation, and silicon issue root-cause analysis.
• Work closely with foundry technology teams to ensure proper utilization of process design kits (PDKs) and models, leveraging device and reliability insights on transistors and passive components.

Qualifications

• Ph.D. degree in Electrical Engineering or related discipline with minimum 5 years' industry experience in RF/Analog CMOS IC design; alternatively, a Master's degree with at least 7.5 years of experience.
• Proven expertise designing RF transmitter/receiver chains and RF phase-locked loops (PLL)/synthesizers.
• Comprehensive knowledge of RF-Analog IC design principles and substantial experience with product-level tape-outs.
• In-depth understanding of CMOS transistor and inductor device physics addressing noise, linearity, device non-idealities, parasitics, and on-chip matching networks.
• Thorough grasp of IC layout and packaging impacts on circuit behavior including parasitic effects, crosstalk, noise in supply/ground/substrate, and isolation strategies.
• Hands-on experience with IC testing and debugging utilizing RF laboratory equipment such as spectrum analyzers, network analyzers, signal generators, and oscilloscopes.
• Proficiency in industry-standard design tools including Cadence Virtuoso, Spectre/SpectreRF simulators, PeakView or equivalent electromagnetic solvers for passive element and package modeling.

Additional Information

Travel requirements range from none up to 25%. We request recruitment agencies refrain from submitting resumes unsolicited to our teams or employees, as Microchip is not liable for fees from unsolicited submissions.