Hardware Design Verification Engineer

Overview

A prominent global semiconductor firm is seeking a Security Hardware Design Verification Engineer to join their expanding team based in Cork, Ireland. This role offers the chance to engage in cutting-edge Security IP development for next-generation System-on-Chips (SoCs) that serve mobile, computing, and data center sectors. You will collaborate with a diverse international group of experts focusing on the design and verification of sophisticated security subsystems like hardware root of trust, cryptographic accelerators, and secure processing technologies.

Key Responsibilities

• Collaborate across worldwide teams including hardware architecture, software engineering, SoC design, and security penetration testing.
• Assist in the verification of advanced security subsystems involving CPUs, Networks-on-Chip (NoCs), cryptographic accelerators, and key management modules.
• Design, develop, and sustain verification frameworks for hardware intellectual property and SoC-level circuitry.
• Contribute to verification procedures ensuring subsystems comply with stringent security certification requirements such as AVA_VAN.5 and EAL5+.
• Conduct unit and SoC-level verification to validate functionality, reliability, and adherence to specifications.

Qualification Requirements

• Bachelor’s degree in Engineering, Computer Science, or a related technical field.
• Demonstrable experience in hardware design verification, testing, and validation for complex SoCs.
• In-depth knowledge of SoC verification methodologies, relevant tools, and industry best practices.
• Proficiency in building unit-level and SoC-level testbenches using VMM, OVM, or UVM frameworks.
• Experience with Gate-Level Simulation (GLS) approaches for SoC validation.
• Strong analytical thinking, problem-solving ability, and effective communication skills.

Preferred Experience

• Familiarity with hardware security architecture and security intellectual property.
• Understanding of cryptographic algorithms and their implementations in hardware.
• Exposure to security principles including hardware root of trust and secure processing technologies.

Additional Information

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