Analog Layout Engineer

Job Overview

HCLTech seeks seasoned Analog Layout Engineers to join their Semiconductor Engineering division located in Bangalore. Candidates will engage in designing sophisticated custom analog and mixed-signal layouts leveraging state-of-the-art semiconductor technologies.

Primary Responsibilities

• Manage and execute Analog and Mixed-Signal Layout projects, including domains such as Power Management, Data Converter circuits, High-Speed Analog, IO interfaces, Clocking Solutions, and Custom IP creation.
• Develop schematic-driven physical layouts for components like Phase-Locked Loops (PLL), Analog-to-Digital Converters (ADC), Digital-to-Analog Converters (DAC), Low Dropout Regulators (LDO), PHY IPs, and bespoke digital circuits, demonstrating expertise in floorplanning, device matching, signal integrity, and power grid architecture.
• Conduct and troubleshoot physical design verification tasks including Design Rule Checks (DRC), Layout Versus Schematic (LVS), Electrical Rule Checks (ERC), Antenna effects, Electromigration/IR drop (EM/IR), alongside ESD protection and latch-up prevention measures to ensure layouts are tape-out ready.
• Utilize knowledge of cutting-edge process technologies spanning Intel Advanced Nodes, TSMC N16/N7/N5/N3, Samsung Advanced Nodes, GlobalFoundries, Bipolar CMOS (BCD), and Bi-CMOS processes.
• Collaborate intimately with circuit design and engineering teams on Power, Performance, Area (PPA) and Design for Manufacturability (DFM) enhancements as well as perform comprehensive layout evaluations; senior roles encompass team leadership, mentoring engineers, scheduling, delegating tasks, refining EDA methodologies, and automating workflows via scripting languages such as SKILL, Perl, and Python.

Contact

Interested candidates or inquiries can be addressed to Karthikadasunarsima.karthik@hcltech.com.