Analog Design Engineer - SERDES

Overview

At Apple, we dedicate ourselves daily to building products that enhance users' lives. If you're passionate about solving unprecedented challenges and innovating in IC design, this position offers you a remarkable chance to contribute to future products that will delight millions worldwide.

Role and Responsibilities

As an Analog Design Engineer focused on SERDES, you will develop sophisticated high-performance, high-speed analog and mixed-signal (AMS) circuits implemented in SerDes PHY systems. Your tasks include evaluating diverse circuit topologies such as Rx, CDR, Tx, bias generators, high-speed clocks, low-jitter distribution, phase interpolators, DLLs, and VCOs, optimizing for power, performance, and area (PPA).

You will collaborate closely with multidisciplinary teams including architecture, SIPI, packaging, board design, DFT, and ESD, to define block-level specifications and proceed through transistor-level design and behavioral modeling. You will lead mask layout designs and work in tandem with SoC teams to ensure IP delivery meets rigorous quality benchmarks. Regular interactions with peers and management will facilitate progress sharing and innovative discussion.

Required Qualifications

• Deep expertise in analog mixed-signal design, particularly with high-speed serial communication.
• Proficient in designing analog-mixed signal blocks: bandgap references, bias circuits, LDO regulators, amplifiers, comparators, switched-capacitor circuits, ADCs, DACs, oscillators, and filters.
• Strong foundation in analog-mixed signal concepts including mismatch reduction, linearity, stability, low-power operation, and noise minimization.
• Understanding of digitally assisted analog techniques such as background calibration and LMS adaptive loops.
• Experience with high-speed digital circuits (serializer, deserializer, counters, dividers) and digital design principles.
• Familiarity with Tx/Rx equalization techniques and circuits (CTLE, DFE, de-emphasis) for 20+ Gbps NRZ and PAM signaling.
• Knowledge of clock data recovery (CDR) architectures and implementations.
• Competence in using lab instrumentation for testing.
• Experience in AMS circuit modeling and performance evaluation utilizing tools like SystemVerilog, Matlab, Python, VerilogAMS.
• Hands-on experience designing with advanced CMOS and FinFET technologies.
• Comprehensive involvement in AMS IC development from specification through high-volume manufacturing, including layout oversight, bench evaluation, correlation, and characterization.

Preferred Skills and Additional Expertise

• Familiarity with timing closure concepts and industry-standard tools such as Nanotime and Primetime.
• Experience in lab testing, debugging, and data analysis of high-speed serial I/O circuits.
• Knowledge of prevalent high-speed SerDes protocols (PCIe, USB, DisplayPort, MPHY).
• Proficiency in scripting and automation aimed at enhancing workflow efficiency.

Preferred Education and Inclusion Statement

A master's or doctoral degree in Electrical Engineering or equivalent experience is desired. Apple champions equal opportunity employment fostering diversity and inclusion, encouraging applicants from minorities, women, protected veterans, and individuals with disabilities. Compensation discussions are supported to ensure transparency.

Accessibility and Culture

Apple upholds accessibility as an essential human right, embodied in our culture, benefits, and digital resources. We strive for diverse perspectives to cultivate an inclusive environment where every employee can thrive.