SOC Design Verification Engineer

Position Overview

We are seeking an experienced SOC Design Verification (DV) Engineer specialized in validating GPIO, sensors, CPU cores, Debug Architecture, and eFuse components. This role is based in Bangalore and requires a collaborative professional with strong problem-solving skills to contribute effectively within a cross-functional team.

Responsibilities

• Develop and execute verification processes focused on SOC design components including GPIO, sensors, Debug Architecture, and eFuse.
• Engage in testbench development and conduct thorough coverage analysis to ensure high-quality SOC projects.
• Utilize SystemVerilog and UVM methodologies along with appropriate scripting and hardware debugging tools.
• Collaborate with various teams to resolve technical issues efficiently.

Requirements

• 4 to 6 years of hands-on experience in SOC Design Verification.
• Strong expertise in GPIO, sensor verification, Debug Architecture, and eFuse validation.
• Proficient in verification methodologies, testbench creation, and coverage analysis for SOC designs.
• Skilled in SystemVerilog/UVM, scripting languages, and usage of hardware debugging tools.
• Good to have experience in CPU core verification and frequency monitor validation.
• Bachelor's or Master's degree in Technology or Engineering (B.Tech/B.E/M.Tech/M.E).

Additional Information

The ideal candidate must demonstrate excellent problem-solving abilities and work well in team environments that require cross-disciplinary cooperation.