Senior Engineer - SoC Design Verification
Toronto, Ontario, Canada · Full Time
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- Experience
- Any
- Salary
- USD 100,000 – USD 500,000 / year
- Openings
- 1
- Posted
- 4 weeks ago
- Work mode
- In office
- Resume
- Required to apply
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Job description
About Tenstorrent
Tenstorrent is pioneering next-generation AI technology, transforming expectations around performance, usability, and affordability. With the AI computing landscape evolving rapidly, innovations must harmonize advances in software modeling, compilers, platforms, networking, and semiconductor technology. Our team has built a high-performance RISC-V CPU from the ground up, driven by a collective passion for AI and dedication to creating the best AI platform. We embrace collaboration, curiosity, and a spirit to tackle complex challenges. Our team is expanding across various experience levels.
Role Overview
We are recruiting an experienced SoC Design Verification Engineer tasked with leading pre-silicon verification efforts of the Beowulf SoC, focusing primarily on the Compute Subsystem (CSS), DDR memory interfaces, and Fabric Network-on-Chip (NoC). This position requires ownership over coverage, coherence, memory traffic, connectivity, error management, and initialization capabilities critical for successful silicon validation.
The position is based onsite with hybrid working options from our offices in Boston, MA; Toronto, ON; or Santa Clara, CA.
Key Responsibilities
- Design and maintain scalable verification environments targeting Beowulf SoC's CSS, DDR, and Fabric NoC at subsystem and full-chip levels.
- Develop and execute comprehensive test benches addressing compute operations, memory setup and traffic patterns, coherency protocols, routing and ordering, quality of service, power management, error states, and data transfer scenarios.
- Identify coverage shortfalls, troubleshoot failures, conduct root cause analyses, and collaborate closely with architecture, RTL development, firmware, emulation, and systems engineering teams.
- Lead verification planning, regression processes, and coverage closure to enable feature signoff on critical SoC components.
- Automate testing workflows through scripting, reusable verification infrastructure, and AI-assisted productivity tools.
- Mentor team members and contribute improvements to verification methodologies and design-for-test strategies.
Required Qualifications and Skills
- A strong curiosity and thorough understanding of SoC design, focusing on compute systems, DDR memory behavior, and Fabric NoC/interconnect verification.
- Expertise in UVM methodology, SystemVerilog, coverage-driven verification, assertions, and subsystem debugging.
- Proven experience validating compute subsystems, DDR controller and PHY logic, NoC/interconnect protocols, coherence and ordering issues, and data movement.
- Familiarity with reset sequences, power management techniques, error processing, and high-concurrency system challenges.
- Detail-oriented, proactive, and effective in interdisciplinary technical discussions.
- Comfortable using verification automation tools and languages such as Python, C/C++, Tcl, and Cocotb.
Learning Opportunities
- Gain profound expertise in comprehensive SoC verification covering compute, DDR memory, coherence, and Fabric NoC using state-of-the-art tools and workflows.
- Engage with the integration of pre-silicon verification alongside emulation, silicon bring-up, and platform-level validation techniques.
- Explore how AI-powered automation is transforming contemporary design verification processes.
- Experience system-level verification challenges in advanced, high-performance AI SoC designs.
Compensation and Legal Requirements
Compensation ranges widely from $100,000 to $500,000 annually, inclusive of base and variable components, influenced by experience, skills, education, background, and geographic location.
Tenstorrent offers a comprehensive benefits package and is an equal opportunity employer.
Note on Employment Conditions: Employment offers are subject to compliance with U.S. export control regulations due to access to technology restricted under the U.S. Export Administration Regulations (EAR). Candidates must meet citizenship or residency requirements or obtain necessary governmental licenses to hold this position. Failure to satisfy these legal prerequisites may result in withdrawal of any employment offer.
Level
Senior