EDA Tooling, Release & Sign-off Engineer

About Synopsys and the Role

Synopsys leads innovations in chip design and software pivotal to the Era of Pervasive Intelligence. Our HPC Controller IP group manages the tooling, automation, and quality processes that build and release complex soft IP products at scale, ensuring accurate assembly, thorough testing, and confident release for customers.

Position Overview

This role is suited for a motivated engineer who thrives on EDA tooling and automation, owning the complete product release and sign-off lifecycle. You will focus on automation, quality assurance, and leveraging AI to enhance engineering efficiency and product reliability. Collaboration with multidisciplinary teams and data-driven decision-making are essential, while prior logic engineering experience is valued but not mandatory.

Key Responsibilities

• Manage the product release cycle for complex soft IP, including assembling deliverables, verifying completeness and configurations, and producing accurate release documentation.
• Execute release testing, apply quality gates, and formally sign off deliverables to ensure correct packaging and readiness for distribution.
• Develop and maintain EDA tools, automation flows, and project infrastructure using Tcl, Python, Makefiles, alongside dashboards monitoring release quality and status.
• Investigate and resolve tooling or release failures end to end by analyzing logs, isolating root causes, communicating progress and risks, and collaborating with design and verification teams to resolve issues.
• Utilize AI technologies to accelerate tasks such as triaging logs, summarizing regression and quality trends, and script generation or refinement.
• Refine documentation, packaging standards, and sign-off protocols to guarantee consistency and repeatability across different IP projects.
• Optional: contribute to mid-end logic processes like synthesis, design for test (DFT), static timing analysis (STA), static checking (SpyGlass), formal equivalence, and power analysis to support release readiness.

Impact of Your Work

• Ensure timely release of correctly packaged products signed off with full confidence.
• Enhance scalability and speed through improved automation and AI-empowered analysis.
• Identify packaging and quality issues earlier during the development cycle.
• Strengthen communication and teamwork along the design-to-release continuum.
• Deliver robust and ready-to-implement soft IP with clear documentation and sign-off processes.

Required Qualifications & Experience

• At least 2 years or equivalent experience working with EDA tools and flow automation.
• Experience or strong aptitude in managing product release and sign-off activities, including packaging deliverables, conducting regression tests, and evaluating quality gates.
• Proficiency in scripting languages such as Tcl and/or Python, with a focus on automation best practices.
• Familiarity with build and packaging systems, source control (Perforce/Git), and continuous integration workflows.
• A solid understanding of ASIC design and verification flows to effectively support and troubleshoot related tooling.
• Competence in leveraging AI tools for improving debugging efficiency, summarizing results, and refining scripts and workflows.
• Strong communication skills—both verbal and written—capable of articulating issues, release progress, risks, and coordinating cross-functional teams.
• Bachelor’s or Master’s degree in Electrical/Computer Engineering, Computer Science, or relevant equivalent experience.

Preferred Additional Skills

• Hands-on experience in logic engineering aspects such as synthesis, STA, DFT, SpyGlass static checking, formal equivalence tools (e.g., Formality), or power analysis.
• Familiarity with Synopsys software like Fusion Compiler, VC SpyGlass, or Formality.
• Knowledge of IP development practices, packaging, or reusable delivery/release documentation.
• Experience creating CI/CD pipelines, regression frameworks, or reporting dashboards.

Personal Attributes

• Proactive, inquisitive, and flexible.
• Collaborative, communicative, and ethical.
• Driven by flow processes, keen on AI integration, and committed to quality.
• Resilient and focused on delivering results.

Team Environment

You'll join a High-Performance-Compute team responsible for delivering complex IP solutions, collaborating across design, verification, test, physical design, methodology, and project infrastructure to improve mid-end readiness and ensure downstream implementation predictability.

Compensation and Benefits

We provide a broad array of health, wellness, and financial benefits tailored to your needs. More information about salary and benefits will be shared during the recruitment process.