Senior AI Engineer – Design Automation

Job Location

Singapore

Overview

We are seeking a Senior AI Engineer to lead innovation in design automation by leveraging advanced AI technologies aimed at creating faster, smaller, and more energy-efficient semiconductor chips.

Key Duties and Responsibilities

• Utilize Large Language Models (LLMs) for the automatic generation, refinement, and debugging of RTL code in Verilog/SystemVerilog.
• Apply Graph Neural Networks (GNNs) to evaluate chip netlists and proactively identify wiring, spacing, and other physical design challenges early in the design process.
• Build autonomous AI agents that operate EDA tools, interpret outputs, diagnose faults, and implement corrections with limited human oversight.
• Transform state-of-the-art AI research for electronic design automation (EDA) into reliable, scalable software solutions for use by silicon engineering teams.

Candidate Requirements

• Ph.D. degree in Computer Science, Artificial Intelligence, Machine Learning, or a related field.
• Research experience demonstrated through thesis or publications in areas such as Graph Machine Learning, Verilog/SystemVerilog code optimization, or NLP applied to code or hardware description languages.
• Familiarity with traditional VLSI design methodologies including synthesis, static timing analysis, and physical design is advantageous.
• Strong expertise in PyTorch, PyTorch Geometric (PyG), and advanced LLM frameworks.
• Proficient programming abilities in Python.