Backend Engineer – Synthesis

Job Overview and Responsibilities

As a Backend Engineer specializing in synthesis, you will be accountable for translating RTL designs into gate-level netlists and collaborating closely with the RTL design team to develop and validate Synopsys Design Constraints (SDC). Your role involves partnering with Place-and-Route (PnR) engineers to optimize Power, Performance, and Area (PPA) metrics for digital modules. Additionally, you will handle Design for Test (DFT) duties across chip or module levels, encompassing synthesis, scan insertion, Automatic Test Pattern Generation (ATPG), Memory Built-In Self-Test (MBIST), boundary scan, and functional testing.

You will also work collaboratively with both front-end and back-end teams to conduct DFT-related Static Timing Analysis (STA), power analysis, and IR drop analysis to guarantee timing closure for DFT designs.

Qualifications and Skills

• Possess at least a Bachelor's degree in Microelectronics, Electronic Engineering, or a related discipline.
• Demonstrate familiarity with backend IC design flows and tools, with preference for experience using Electronic Design Automation (EDA) software such as Design Compiler (DC), Formal Compiler (FC), and TetraMax.
• Proven experience implementing physical design and verification practices on large-scale integrated circuits fabricated at technology nodes of 28nm or smaller.
• Capability in hardware description and scripting languages including Verilog, TCL, Perl, and Python is advantageous.
• Excellent communication skills complemented by strong resilience under pressure and the ability to collaborate effectively across departments.