Tharun Srinivasan

Tharun Srinivasan

ECE undergraduate · Hardware, Embedded Systems & FPGA/SoC Design

Chennai, Tamil Nadu, India

@tharun_srinivasan

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🎓 B.Tech, Electronics and Communication Engineering at Vellore Institute of Technology (VIT), Chennai · Graduating 2028

About

Electronics and Communication Engineering undergraduate focused on hardware engineering, embedded systems, and FPGA/SoC design and validation. Hands-on experience spans industrial IoT telemetry, embedded firmware, wireless robotics, low-power RTL, PCB/electronics, and edge intelligence.

Experience

  • IoT & AI Systems Developer Intern
    AKVO Atmospheric Water Systems Pvt. Ltd. · Chennai
    Jan 2026 – Jun 2026

    Engineered backend services for an industrial IoT monitoring platform supporting Atmospheric Water Generator machines using Python, FastAPI, REST APIs, and Supabase/PostgreSQL. Integrated ESP32 telemetry for real-time machine data; designed schemas for telemetry, alerts, device states, and operational logs. Implemented scheduled automation for offline-device detection, compressor rapid-cycling detection, and alert management using APScheduler. Built telemetry simulators and end-to-end test utilities; configured local server/database environments and documented architecture, failure modes, and technical debt.

Education

  • B.Tech
    Vellore Institute of Technology (VIT), Chennai
    Electronics and Communication Engineering · 2024 – 2028

Skills

Tools / apps / platforms

6 to 12 months 6 to 12 months Most of a year behind them.
Supabase PostgreSQL
<3 months <3 months Just getting started - under three months. This is also what shows when a level has not been set.
Git KiCad Docker GitHub SQLite Arduino Proteus Firebase Raspberry Pi

Languages

Native / Bilingual Native / Bilingual Their first language, or as strong as one.
Tamil Speak
Fluent Fluent Comfortable using it for work.
English Speak
Conversational Conversational Can hold an everyday conversation.
Hindi Speak
Basic Basic A few words and simple phrases.
German Speak Japanese Speak

Projects

  • LDACS Aeronautical-Comms Receiver
    Zynq-7000, Verilog, Vivado/Vitis 2022.2, Embedded C, Python, AXI DMA/UART

    Built an end-to-end LDACS receiver following Kurz et al. with FPGA PL RTL decoding, ARM PS processing, AXI DMA and UART bridging, plus a Python reference model and live web console.

  • ClawGrid V2.0
    ESP32-S3, ESP-NOW, ESP-IDF/FreeRTOS, TinyML

    Designed distributed edge intelligence where nodes exchange compact events, state, intents, policies, and health information with graceful degradation under node or gateway failure.

  • HopperNet V2
    Python, Pygame, AES-GCM

    Built a 100-node mobile-network simulator with adaptive FHSS, DTN buffering and forwarding, dynamic topology, jamming scenarios, and experiment metrics.

  • ZedBoard Zynq-7000 FPGA-SoC Neural Hardware Prototype
    Zynq-7000, Vivado 2022.2, Vitis 2022.2, Verilog

    Designed and validated a 3-neuron LIF SNN prototype in programmable logic with ARM processing-system integration and hardware/software verification.

  • Robo Soccer Striker
    Dual ESP32, ESP-NOW, BTS7960, 300 RPM Motors, 3S LiPo

    Directed wireless drive and calibrated motor/current parameters across 30+ match runs, reducing repeat failures and advancing to the national finalist stage.

  • AI-Automated Antenna Design & EM Simulation
    Python, Local ML, CST Studio Suite, ANSYS HFSS

    Built a local ML-driven workflow for antenna-geometry generation, EM simulation, result extraction, and model-guided optimization.

  • Smart Classroom IoT System
    ESP32-C3, Raspberry Pi, Firebase, React

    Integrated sensors through an edge-to-cloud pipeline, implemented filtering and retry logic, and built real-time monitoring dashboards.

  • Compact Antenna for Smart Glasses
    CST, FR-4

    Designed a temple-mounted IFA baseline and optimized matching toward target RF performance across 2.4–2.5 GHz.

  • FPGA Image Recognition & Processing
    Verilog HDL, Quartus Prime, ModelSim

    Implemented and simulated image-processing modules in Verilog, synthesized in Quartus, and validated functionality in ModelSim.

  • Carbon Monoxide Toxicity Prevention System
    Embedded C, GSM, GPS

    Designed real-time CO detection with threshold logic, automated SOS, GPS tracking, and GSM alerts.

🏆 Achievements & awards

  • Top 3 / Winner — Hardware Track, Parallax 2026 · 2026

    VIT Chennai

  • Top 50 — Smart India Hackathon · 2025

    Among 1,700+ teams

  • National Finalist / Knockout Stage — Robo Soccer, IIT Madras Shaastra · 2026
  • 96 Percentile — JEE Main · 2024

⚽ Extracurricular activities

  • Secretary, VITSION Moviemakers Club

    Coordinated club operations, marketing initiatives, sponsorship outreach, and event execution.

  • Active Member, Tech Researchers Club & E-Cell Entrepreneurship Club

    Contributed to research discussions, technical events, startup ideation, and project proposals.

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