SD

Sinchana Ds

ECE Undergraduate Student | Aspiring VLSI & RTL Design Engineer | Digital Design | Verilog & SystemVerilog | Exploring UVM & Semiconductor Technologies | Passionate About Real-World Hardware Design

Chikkamagaluru, Karnataka, India

@sinchana_ds

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About

ECE undergraduate student with an interest in VLSI and RTL Design. Currently building skills in Verilog, SystemVerilog, Digital Electronics, and 8051 microcontrollers. Interested in learning through internships and hands-on projects in the semiconductor and VLSI domain.

Skills

Tools / apps / platforms

<3 months <3 months Just getting started - under three months. This is also what shows when a level has not been set.
The MathWorks MATLAB

Languages

Fluent Fluent Comfortable using it for work.
Kannada Speak · Read · Write
Conversational Conversational Can hold an everyday conversation.
English Speak · Read · Write

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