Praveen Kumar Narepalem
Final-year ECE student · Aspiring VLSI Physical Design Engineer
Pedana, Andhra Pradesh, India
@praveen_kumar_narepalem
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🎓 B.Tech in Electronics and Communication Engineering at Seshadri Rao Gudlavalleru Engineering College · Graduating 2027
About
Final-year Electronics and Communication Engineering student with hands-on experience in physical layout design for basic logic circuits and transistor-level simulation. Interested in building a career in the Semiconductor/VLSI industry with training in physical design flow and industry tools.
Education
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2027
B.TechElectronics and Communication Engineering (ECE) · 2027
- 2023
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2021
SSCZPHS Vadlamannadu High School2021 – 2021
Skills
Tools / apps / platforms
Languages
Projects
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Medicine Reminder SystemArduino
Built an Arduino-based medication reminder system with buzzer/display alerts and SMS/call notifications for missed doses.
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Automatic Railway Gate Control System
Designed a sensor-based system to automatically open and close a railway gate using ultrasonic sensors and a microcontroller.
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Full Adder Design using LTspiceLTspice
Designed and simulated a full-adder circuit at the transistor level, analyzed propagation delay, power dissipation, and energy consumption, and automated simulation across different process nodes.
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Logic Gate, Half Adder, and Full Adder Layout Design
Implemented physical layouts for basic logic gates, half adder, and full adder circuits.
⚽ Extracurricular activities
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Technical workshops and seminars participation
Participated in technical workshops and seminars on VLSI and electronics.
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Technical events participation
Participated in technical events hosted by various engineering colleges.
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Academic mini-project development
Actively involved in academic mini-project development.