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Palak Twinwal

electronics and communication engineering student

Jaipur, Rajasthan, India

@palak_twinwal

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🎓 Bachelor of Engineering (B.E) in Electronics and Communication Engineering at MBM University · Graduating 2027

About

Electronics and Communication Engineering student with hands-on exposure to railway signaling systems, circuit simulation, and VLSI testing concepts. Interested in embedded systems, semiconductor technologies, and engineering problem-solving, with experience in technical event coordination and teamwork.

Experience

  • Signals Intern
    Indian Railways · Jaipur
    Jun 2024 – Jul 2024

    Studied railway signaling systems, track circuits, and associated control/interlocking infrastructure. Analyzed railway safety mechanisms, fault detection techniques, and real-time maintenance workflows. Gained practical exposure to safety-critical communication systems in active railway operations.

Education

  • Bachelor of Engineering (B.E)
    Electronics and Communication Engineering (ECE) · 2027

Skills

<3 months <3 months Just getting started - under three months. This is also what shows when a level has not been set.

Tools / apps / platforms

<3 months <3 months Just getting started - under three months. This is also what shows when a level has not been set.
Canva Logisim The MathWorks MATLAB

Languages

Fluent Fluent Comfortable using it for work.
Hindi Speak English Speak

Projects

  • Automated Railway Track Obstacle & Fault Detection System
    IR sensors, microcontroller logic, Multisim, C

    Designed and simulated a prototype system aimed at enhancing railway safety through real-time track monitoring. Integrated IR sensors and microcontroller logic to detect physical obstacles and track continuity faults. Implemented automatic warning/alert signaling mechanisms based on railway interlocking and safety principles.

  • Design and Simulation of Combinational Digital Circuits using Logisim
    Logisim

    Modeled and tested core digital logic components including adders, multiplexers, and logic gates to verify functional truth tables. Analyzed signal flow, gate delays, and logic optimization in digital system architecture.

Courses & certifications

  • VLSI Test Workshop · IEEE TTTC & IEEE CAS - IIT Jodhpur

⚽ Extracurricular activities

  • Design Team Member

    Contributed to a World Record Attempt event at MBM University and assisted in assembling and coordinating robotics activities to build the Indian Map using autonomous/guided robots. Awarded a Certificate of Appreciation for technical execution and team coordination.

🎯 Hobbies & interests

  • art and sketching

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