KOTLA MANIKANTH YADAV

B.Tech ECE student · VLSI, Embedded Systems & AI/ML

Hyderabad, Telangana, India

@kotla_manikanth_yadav

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🎓 B.Tech – Electronics & Communication Engineering at Nalla Narasimha Reddy Education Society’s Group of Institutions · Graduating 2027

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About

B.Tech Electronics & Communication Engineering student with knowledge of VLSI, Verilog HDL, RTL design, embedded systems, Python, MATLAB, AI/ML, and computer vision. Has hands-on internship and academic project experience in low-power digital design, full-stack development, and image-processing applications.

Experience

Industry-Oriented Internship Programs

EduSkills

Completed cohort-based industry-oriented training in Google Android Development, MERN Full Stack Development, Quantum Computing, and employability skills; gained practical exposure to AI/IoT, application development, full-stack technologies, and cloud concepts.

Education

B.Tech – Electronics & Communication Engineering

Nalla Narasimha Reddy Education Society’s Group of Institutions

Electronics & Communication Engineering · 2023 – 2027
Intermediate – MPC

Sri Chaitanya Junior College

MPC · 2021 – 2023
Secondary

2021 – 2021

Skills

<3 months

IoT VLSI NumPy Python Pandas OpenCV Sensors Matplotlib Embedded C RTL Design Verilog Hdl scikit-learn Deep Learning Digital Design Computer Vision Neural Networks Machine Learning Embedded Systems Image Processing Microcontrollers Analog Electronics Digital Electronics Signals And Systems Communication systems

Tools / apps / platforms

<3 months

VS Code Arduino IDE The MathWorks MATLAB

Languages

Not stated

Hindi Speak Telugu Speak English Speak

Projects

Deep Learning-Based Environmental Monitoring Using Multi-Temporal Satellite Images

MATLAB | Deep Learning | Image Processing | Satellite Imagery

Developing a deep-learning-based system for analyzing multi-temporal satellite images and identifying environmental changes over different time periods.
Design and Implementation of Low Power Approximate Multiplier using Reconfigurable Truncation

VLSI | Verilog HDL | Digital Design

Designed and implemented a low-power approximate multiplier using reconfigurable truncation techniques. Developed the RTL design using Verilog HDL for efficient multiplication and analyzed the trade-off between power, area, and computational accuracy.

Courses & certifications

Introduction to Industry 4.0 and Industrial Internet of Things · NPTEL
Introduction to Internet of Things · NPTEL
MERN Full Stack Development + Project · EduSkills
Google Android Developer · EduSkills
Quantum Computing · EduSkills
Employability Skill Job Ready · EduSkills

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