KY

Kandregula Yaswanth

B.Tech ECE student · Aspiring VLSI Engineer

Anakapalli, Andhra Pradesh, India

@kandregula_yaswanth

0 followers

About

B.Tech student in Electronics and Communication Engineering with a focus on ASIC design, low-power VLSI, Verilog, RTL design, and UPF-based power management. Interested in applying hands-on semiconductor design skills to real-world power-efficient design challenges.

Experience

  • Intern
    Defence Research and Development Organisation (DRDO), Centre for Advanced Systems (CAS)
    Aug 2026 – Present

Education

  • B.Tech in Electronics and Communication Engineering
    Electronics and Communication Engineering · Aug 2023 – May 2027
  • Intermediate (MPC)
    Dr. Himasekhar Junior College
    MPC · 2023 – 2023
  • Secondary School Certificate (SSC)
    Bhashyam Educational Institutions
    2021 – 2021

Skills

<3 months <3 months Just getting started - under three months. This is also what shows when a level has not been set.

Tools / apps / platforms

<3 months <3 months Just getting started - under three months. This is also what shows when a level has not been set.
Linux Synopsys Design Compiler

Projects

  • EchoBridge – Smart Audio Awareness System

    Developing a smart audio awareness system that alerts users when someone calls them while using earphones, with customizable voice-trigger detection and smartphone/smartwatch connectivity.

  • Smart Sensor Hub – UPF Power Domain Design
    Verilog HDL, UPF (IEEE 1801), Synopsys Design Compiler (DC Shell)

    Designed a low-power VLSI system with four power domains, implemented power gating, isolation cells, level shifters, and retention registers across ON, SLEEP, and DEEP SLEEP states.

  • Dual-Window Watchdog Timer – Multi-Domain UPF Power Intent Design
    Verilog HDL, Icarus Verilog, GTKWave, Yosys, Synopsys Design Compiler, UPF

    Designed and verified a Dual-Window Watchdog Timer for fault detection and system monitoring. Developed RTL modules, performed RTL simulation, and explored UPF-based low-power design and synthesis flow.

🏆 Achievements & awards

  • ISWDP Samsung Fellowship · 2025

    Recipient for academic excellence, technical aptitude, and potential in semiconductor and VLSI research.

  • IEEE Electronic Devices Society (EDS) Membership · 2025

    Professional member demonstrating active interest in electronic devices, semiconductor technology, and VLSI innovation.

Explore the Broxer community

🤖
Online · instant AI help
Broxer