About
Electronics and Communication Engineering undergraduate with hands-on experience in RTL design, digital design, embedded systems, PCB design, and circuit simulation. Skilled in Verilog HDL, SystemVerilog, Embedded C, simulation, verification, and hardware debugging, with projects including an 8-bit RISC processor, UART controller, FIFO memory design, and a low-power data logger.
Experience
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Embedded Systems InternCranes Varsity · BengaluruJun 2025 – Jul 2025
Developed and tested Arduino-based embedded systems using Embedded C, peripheral interfacing, and sensor interfacing. Worked with microcontroller peripherals and performed hardware debugging, functional testing, and system validation. Applied embedded-system concepts to interface hardware components and evaluate system behavior through testing.
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Digital & Analog Design InternBNMIT · BengaluruJul 2024 – Aug 2024
Designed and simulated analog and digital circuits using LTSpice and Simulink, applying circuit-analysis and digital-design concepts. Performed circuit analysis, simulation-based verification, functional testing, and hardware testing to evaluate circuit behavior. Applied debugging and circuit-analysis techniques to identify and troubleshoot design issues during testing.
Education
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2027
B.E.B.N.M. Institute of TechnologyElectronics and Communication Engineering (ECE) · 2023 – 2027
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Class XIISri Kumaran Children’s Home Composite PU College
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Class XSAMVED School
Skills
Tools / apps / platforms
Projects
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Low Power Data LoggerEmbedded Systems, Arduino
Developed a sensor-based real-time data acquisition system using Arduino and embedded programming. Implemented sensor interfacing and periodic data acquisition using microcontroller peripherals. Tested hardware operation and analyzed sensor readings for reliable data collection.
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FIFO Memory DesignVerilog HDL, RTL Design
Designed a synchronous FIFO memory using synthesizable Verilog HDL for sequential data storage and retrieval. Implemented read/write control logic, memory addressing, full and empty status detection using RTL techniques. Verified FIFO functionality through simulation using read/write sequences and boundary conditions.
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UART Communication ControllerVerilog HDL, RTL Design
Designed a synthesizable UART communication controller using Verilog HDL and synchronous RTL design techniques. Implemented serial communication control logic and timing mechanisms for data transmission and reception. Verified controller behavior using simulation and waveform analysis.
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8-bit RISC ProcessorVerilog HDL, RTL Design
Designed and implemented an 8-bit RISC processor using synthesizable Verilog HDL and modular RTL architecture. Developed processor building blocks for control, arithmetic, data processing, sequential, and combinational logic. Analyzed processor behavior through simulation and waveform-based verification.
Courses & certifications
- Arduino, Embedded C Verilog HDL & Digital Design Training
- Embedded Systems Bootcamp
- PCB Design Training · PCB Design Training
- TOSCA Certification · TOSCA