BK

Budi Aruna Kumari

B.Tech ECE student ·

Anakapalli, Andhra Pradesh, India

@aruna_budi

0 followers

🎓 B.Tech in Electronics and Communication Engineering at Gayatri Vidya Parishad College of Engineering for Women · Graduating 2027

About

Final-year B.Tech Electronics and Communication Engineering student with foundational skills in Verilog, FPGA simulation, Python, C programming, and Arduino-based embedded systems. Interested in digital design, hardware development, and embedded technologies, with project and internship exposure in VLSI and Python development.

Experience

  • VLSI Essentials Intern
    Council for Skills and Competencies (CSC India)

    Completed a two-month VLSI Essentials internship under the APSCHE Student Internship Initiative. Gained foundational knowledge of VLSI concepts, semiconductor technologies and digital design.

  • Python Full Stack Intern
    ExcelR India Solutions

    Gained experience in Python, HTML, basic SQL and machine learning through application-based projects. Developed a face-recognition-based attendance system using Python and OpenCV.

Education

  • B.Tech
    Gayatri Vidya Parishad College of Engineering for Women
    Electronics and Communication Engineering (ECE) · 2023 – 2027
  • Intermediate
    Sri Vivekananda Junior College
    Science · 2021 – 2023
  • High School
    Mother Teresa High School
    SSC · 2020 – 2021

Skills

<3 months <3 months Just getting started - under three months. This is also what shows when a level has not been set.

Tools / apps / platforms

<3 months <3 months Just getting started - under three months. This is also what shows when a level has not been set.
Arduino Arduino IDE

Projects

  • Face Recognition-Based Attendance System
    Python, OpenCV

    Developed a face-recognition-based attendance system using Python and OpenCV. Implemented face detection and recognition to automate attendance recording.

  • CNN-Based Image Processing on FPGA
    Verilog, Xilinx Vivado

    Implemented CNN convolution operations using Verilog and Xilinx Vivado simulation. Worked with modules including convLayerSingle, convUnit, and RFselector for convolution processing. Applied digital design concepts to develop and simulate image-processing functionality.

Courses & certifications

  • Python Object-Oriented Programming · Udemy
  • Machine Learning · AWS Academy
  • Verilog HDL Hands-On Training · Maven Silicon
  • Verilog for FPGA Design using Vivado · Udemy
  • Digital Design with Verilog · NPTEL

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