Sai Anshu T C

About

Electronics and Communication Engineering student with a strong foundation in core electronics and digital systems. Hands-on experience through academic projects and research work involving hardware design, serial communication, and PCB design.

Experience

• Research Intern
  Indian Institute of Science (IISc) · Bengaluru
  Aug 2026 – Present

  Project: Serenity-S1 Factory Acceptance Testing (FAT) for HL-LHC CMS Upgrade at CERN. Assisting in the validation and testing of advanced electronic boards to be deployed in CERN’s CMS detector upgrade.

Education

• 2027 BM
  Bachelor of Engineering

  B.M.S. College of Engineering

  Electronics and Communication Engineering (ECE) · 2023 – 2027

  Electronics and Communication Engineering (ECE) · 2023 – 2027

Skills

Tools / apps / platforms

Languages

Projects

• Design and Verification of SPI
  Verilog HDL

  Designed and implemented a configurable SPI Master module supporting multiple clock modes (CPOL & CPHA). Developed SPI Slave module with shift-register based data transmission and reception. Implemented full-duplex serial communication with programmable clock frequency. Designed finite state machine (FSM) architecture for SPI control logic. Supported configurable data frame widths (8-bit/16-bit). Implemented chip-select (CS) control and synchronization logic.

• Traffic Light Controller using Verilog RTL
  Verilog HDL, Xilinx Vivado

  Designed and implemented a Moore finite state machine (FSM) to control traffic signal sequencing. Implemented counter-based timing logic and developed a Verilog testbench for functional verification. Verified correct state transitions, reset behavior, and sequential operation through waveform analysis.

• APB-Based UART Controller with FIFO Architecture for Medical Devices
  Verilog HDL, Xilinx Vivado

  Designed an APB-based UART controller integrating UART TX/RX, Baud Rate Generator, and FIFO buffers. Implemented FSM-based UART transmitter and receiver with 16× oversampling and verified the RTL design using functional simulation and waveform analysis.

• CubeSat Avionics PCB Design
  KiCad

  Designed PCB layouts for a 3-board CubeSat avionics stack comprising EPS/Power, OBC/Sensors/GNSS, and LoRa communication modules. Implemented RF-aware PCB layout, performed ERC/DRC checks, and prepared fabrication-ready design data.

🏆 Achievements & awards

• Co-authored research paper published in JETIR · 2026

  APB-Based UART Controller with FIFO Architecture for Medical Devices.

📚 Publications

• APB-Based UART Controller with FIFO Architecture for Medical Devices · 2026